imx6dp IPU driver work failed

[genekong]

Hi, we have a custom board which used IMX6DP6AV1AA, and use 1GB 2-channel lpddr2 for working memory. After we have port u-boot from old board which used imx6qp with 1GB ddr3.  Everything look right except IPU driver.

When run unit_tests, ipu report timeout like this:

root@imx6qevk314:/unit_tests# sh autorun-ipu.sh
=============== test start from Thu Jun 8 12:18:33 UTC 2017 ==============================
Checking for devnode: /dev/mxc_ipu
autorun-ipu.sh: PASS devnode found: /dev/mxc_ipu

imx-ipuv3 2800000.ipu: IPU Warning - IPU_INT_STAT_10 = 0x00100000
Running test case: ./mxc_ipudev_test.out -c 1 -i 1024,768,RGBP,0,0,0,0,0,0 -O 1024,600,RGBP,0,0,0,0,0 -s 0 -f fullsize.rgbp wall-1024x768-565.rgb
pass cmdline 12, ./mxc_ipudev_test.out

new option : c
frame count set 1

new option : i
input w=1024,h=768,fucc=RGBP,cpx=0,cpy=0,cpw=0,cph=0,de=0,dm=0

new option : O
1024,600,RGBP,0,0,0,0,0
new option : s
show to fb 0

new option : f
output file name fullsize.rgbp

new option : 
====== ipu task ======
input:
foramt: 0x50424752
width: 1024
height: 768
crop.w = 1024
crop.h = 768
crop.pos.x = 0
crop.pos.y = 0
output:
foramt: 0x50424752
width: 1024
height: 600
roate: 0
crop.w = 1024
crop.h = 600
crop.pos.x = 0
crop.pos.y = 0
imx-ipuv3 2400000.ipu: ERR:[0x86748c00]-no:0x10 "wait_for_comp_timeout" ret:0,line:2962
imx-ipuv3 2400000.ipu: ERR: [0x86748c00] no-0x10, timeout:1000ms!
imx-ipuv3 2400000.ipu: ERR: no-0x10,ipu_queue_task err:-110
ioct IPU_QUEUE_TASK fail
imx-ipuv3 2400000.ipu: warning: disable ipu dma channel 12 during its busy state
imx-ipuv3 2400000.ipu: warning: disable ipu dma channel 12 during its busy state
imx-ipuv3 2400000.ipu: warning: disable ipu dma channel 12 during its busy state
imx-ipuv3 2400000.ipu: warning: disable ipu dma channel 12 during its busy state
imx-ipuv3 2400000.ipu: warning: disable ipu dma channel 12 during its busy state
imx-ipuv3 2400000.ipu: warning: disable ipu dma channel 12 during its busy state
imx-ipuv3 2400000.ipu: warning: disable ipu dma channel 12 during its busy state
imx-ipuv3 2400000.ipu: warning: disable ipu dma channel 12 during its busy state
imx-ipuv3 2400000.ipu: warning: disable ipu dma channel 12 during its busy state
imx-ipuv3 2400000.ipu: warning: disable ipu dma channel 12 during its busy state
imx-ipuv3 2400000.ipu: warning: disable ipu dma channel 12 during its busy state
imx-ipuv3 2400000.ipu: warning: disable ipu dma channel 12 during its busy state
imx-ipuv3 2400000.ipu: warning: disable ipu dma channel 12 during its busy state

Can anybody tell me why IPU driver failed, all work environment from IMX6DP is same with IMX6QP, this is no error when run in IMX6QP. what's different between with these two chip? Or our u-boot port has some error like Clock setting wrong?

Please give us some adivse, thanks!

If need more information, please tell me...

[genekong · Accepted solution]

After Check IPU debug logging, I found wrong IPU clock report like this:

[ 0.370536] imx-ipuv3 2800000.ipu: After ipu init chan, ipu_conf is 0x00000000.
[ 0.370546] imx-ipuv3 2800000.ipu: panel size = 1024 x 600
[ 0.370552] imx-ipuv3 2800000.ipu: pixel clk = 65002000
[ 0.370621] imx-ipuv3 2800000.ipu: try ipu internal clk
[ 0.370631] imx-ipuv3 2800000.ipu: rounded pix clk:64984615
[ 0.370638] imx-ipuv3 2800000.ipu: round pixel clk:64984615
[ 0.370651] ipu_di1 read BS_CLKGEN0 div:65, final_rate:4224000000, prate:264000000
[ 0.383656] imx-ipuv3 2800000.ipu: div:4

But right one report like this:

[ 0.416331] imx-ipuv3 2800000.ipu: After ipu init chan, ipu_conf is 0x00000000.
[ 0.416341] imx-ipuv3 2800000.ipu: panel size = 1024 x 600
[ 0.416347] imx-ipuv3 2800000.ipu: pixel clk = 65002000
[ 0.416416] imx-ipuv3 2800000.ipu: use special clk parent
[ 0.416426] ipu_di1 read BS_CLKGEN0 div:0, final_rate:1034448976, prate:64653061
[ 0.416432] ipu_pixel_clk: di_clk_ext:0x0, di_gen reg:0x300000.
[ 0.416438] ipu_di1 read BS_CLKGEN0 div:0, final_rate:1034448976, prate:64653061
[ 0.416450] imx-ipuv3 2800000.ipu: round pixel clk:64653061
[ 0.416460] ipu_di1 read BS_CLKGEN0 div:16, final_rate:1034448976, prate:64653061
[ 0.433586] imx-ipuv3 2800000.ipu: div:1

Maybe change to lpddr2 memory, we need change IPU clock setting, but where can't we change it? 

I think kernel code change some clock tree mux. What can we do next?

[genekong]

I found default clock setting can' t work for new chip, now force SOC revision lower, solved this problem.