imx6Q CSI1 configuration for the adv7180

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imx6Q CSI1 configuration for the adv7180

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huangjacky
Contributor III

Dear All:

I want to use the CSI1 of the imx6q  with the adv7180. Anyone has the correct configuration for the CSI1?

I look up the IMX6DQRM.pdf and found out the figure as below:

无标题.png

I understand that csi1 pins is connected to the csi0 of ipu1, so the modify the gpr register  and config the csi device as below, 

however, I can't drvier up the csi device with the adv7180, It seems that the imx6 can not catch any signal from the csi1 pins.

if you have any suggestion, pls tell me and discuss with me.  Thank you advance!

in file arch/arm/mach-mx6/board-mx6q_sabresd.c I add code as bellow:

+ mxc_iomux_set_gpr_register(1, 20, 1, 1);

static struct fsl_mxc_capture_platform_data capture_data[] = {

{

  .csi = 1,

- .ipu = 0,

+ .ipu = 1,

  .mclk_source = 0,

- .is_mipi = 1,

+ .is_mipi = 0,

  }

}

in file drivers/media/video/mxc/capture/adv7180.c

struct sensor {

  int ae_mode;

  int mode;

  v4l2_std_id std_id;

+ int csi;

} adv7180_data;

and set the csi to value 1

static int adv7180_probe(struct i2c_client *client,

  adv7180_data.pix.pixelformat = V4L2_PIX_FMT_UYVY;  /* YUV422 */

  adv7180_data.pix.priv = 1;  /* 1 is used to indicate TV in */

  adv7180_data.on = true;

+ adv7180_data.csi = 1;

Thanks a lot!

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7 Replies

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YixingKong
Senior Contributor IV

Jacky

This discussion is closed since no activity. If you still need help, please feel free to reply with an update to this discussion, or create another discussion.

Thanks,

Yixing

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YixingKong
Senior Contributor IV

Jacky

We have not got your response yet and will close the diacussion in 3 days. If you still need help, please feel free to

reply with an update to this discussion.
Thanks,
Yixing

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YixingKong
Senior Contributor IV

Jacky

We are sorry for getting back to you so late. Are you still stuck with the issue? If you have somehow to resolved the issue, can we close the discussion? If you still need Freescale help, please feel free to contact us.

Thanks,

Yixing

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cyrilcrocquesel
Contributor II

Hi,

I'm working on the same probem for iMX53. Is there any news since May??

Cordially

Cyril

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timharvey
Contributor IV

I've got a perhaps the same issue on a design that has an ADV7180 (the 40pin package with the 8bit output bus) with its 8bit output bus connected to CSI_DATA[0:7].  After looking at all the reference designs, and trying to understand the IPUx_CSI1_SENS_CONF register I don't see where I can specify a shift, LSB, or MSB placement.  I see some rather  cryptic text in 37.4.3.2.1 'If DATA_WIDTH is configured to N, then 20-N LSB bits are ignored.' which is making me believe that the CSI parallel bus MSB must always be CSI_DATA19.

In my case, I'm capturing images but the data is all 0x00 and 0x01 and I know I have data on P[7:0] of the adv7180 routed to CSI_DATA[0:7] of the i.MX6.

Tim

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timharvey
Contributor IV

I thought I would report that my situation above was invalid.  On the IMX6 at least, you need to use the upper bits of the CSI if you choose to not use all of them.  For example, we needed to route P[7:0] from the adv7180 to CSI_DATA[12:19] on the IMX6 CSI.

Tim

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timothybean
Contributor IV

Do you have a schematic that I might be able to look at to see how you hooked this up?

Thanks

Tim

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