imx6 solo/quad ddr3 fly by

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imx6 solo/quad ddr3 fly by

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Contributor I

Hello,

I have a couple of question regarding terminations required when routing ddr3 in fly by topology:

1) What resistor values are required for terminating address/command/control lines? I assume something close enough to single ended line impedance of 50 ohms. So will 47 ohms do the job?

2) What termination (with what resistor values) is required for the clock line. Hardware Guide recommends 2 series resistors Rn tied to a cap to VDD, which I assume is actually Vtt=VDD/2. Why is this type of termination required, as opposed to having the same techniques of each line individually up to Vtt thru a termination resistor.

Thank you

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NXP TechSupport
NXP TechSupport

 

Hello,

 

  look at my comments below.

1.

   Yes, 47 OHm is OK.

2.

   The termination solution of the Hardware Guide with 2 series resistors 49.9 OHm, tied to a cap

of 0.1uF to VDD (1.5V), is still recommended. The cap serves to provide symmetry between

"single ended" signals.

 

Have a great day,

Yuri

 

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NXP TechSupport
NXP TechSupport

 

Hello,

 

  look at my comments below.

1.

   Yes, 47 OHm is OK.

2.

   The termination solution of the Hardware Guide with 2 series resistors 49.9 OHm, tied to a cap

of 0.1uF to VDD (1.5V), is still recommended. The cap serves to provide symmetry between

"single ended" signals.

 

Have a great day,

Yuri

 

-------------------------------------------------------------------------------

Note:

- If this post answers your question, please click the "Mark Correct" button. Thank you!

 

- We are following threads for 7 weeks after the last post, later replies are ignored

Please open a new thread and refer to the closed one, if you have a related question at a later point in time.

View solution in original post

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