imx6 outputting 2.048 mhz esai clk

[andrwebb]

Hi,

I'm trying to interface an imx6ull to an IDT821054 (https://www.renesas.com/us/en/document/dst/821054-data-sheet), which requires a master clock of either 2.048 MHz, 3.072 MHz, 3.088 MHz, 4.096 MHz, 6.144 MHz, 6.176 MHz or 8.192 MHz within a 50 ppm tolerance.

I found this solution earlier(https://community.nxp.com/t5/i-MX-Processors/Doese-the-i-MX6-ESAI-interface-can-support-up-to-2-048M...) but I cant seem to find any combinations on that excel sheet that let me get the esai_clk to 2.048.

Any help would be appreciated.

Thanks. 

[igorpadykov]

Hi andrwebb

I am afraid it is not feasible to produce such clock using xls file settings in mentioned thread.

One can try to find proper combintaion producing master clock on CLKO1,CLKO2 ports

using CCM_CCOSR register described in sect.18.6.21 CCM Clock Output Source Register (CCM_CCOSR)

i.MX 6ULL Applications Processor Reference Manual

Best regards
igor