According to i.MX 6 SD Applications Processor reference manual,
Legacy buffer descriptors are used only in single-ring mode,
that is, when DMAnCFG[DMA_CLASS_EN] are zero.
but I cannot find this register, so when descriptors reach the last one, they cannot warp back, errors happen.
Hi dong
for DMA_CLASS_EN description please check
sect.24.5.42 DMA Class Based Configuration (ENETx_DMAnCFG) i.MX6SX Reference Manual
http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6SXRM.pdf
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Thanks! It comes out my cache has some problem. Another problem is, when I ping my PC with 10000 bytes packets, the link will down sometimes.