imx28 Design based on imx28 heg (energy gateway)

[christianvieira]

Hello all!

I am design a new computer module based on imx28 heg (energy gateway) platform and actually I have the following questions:

1). For what purpose the connexions between SoC (imx28) and memory (DDR2) appear with some data pins exchanged like:

SoC                      DDR2

EMI_D07               DQ0

EMI_D04               DQ2

EMI_D02               DQ3

EMI_D00               DQ4

EMI_D03               DQ6

EMI_D06               DQ7

EMI_D10               DQ9

2). The layout has made with only 4 layers, it's great but checking the connexions between the SoC(iMX28) and memory (DDR2) I've found that some lines are routed in TOP and BOTTOM layer and in some cases some address and data lines has no equal vias distribution (some address and data lines signals has routed in only one layer and the rest has connected using 2 vias). Reading the document about how route memory signals in imx28 I've found that would be great if all the DDR2 signals has connected on one layer, preferably above a ground plane (without split planes).

My principal question is: I can draw a similar schematic and layout a PCB with the same characteristics that I've found?

Thanks anyone,

Christian Vieira

[samsaprunoff · Accepted solution]

Good day Christian

Sometimes designers swap the data lines in order to make it easier to route the printed circuit board.  Remember that the data cells as stored within the RAM do not care what the actual data looks like (each data bit is treated independent of the other bits).

As for the HEG design... you really need to examine your design on the basis of signal integrity in order to determine if the HEG's layout will work for your design.  In my experience the cost difference between a 4-layer and a 6 layer PCB is not that much and so I find that it is not worth the signal integrity risk and/or EMI issues to use the lowest PCB layer count as my principal design objective.

Cheers,

Sam