important! some quetions about mipi apply to imx6dl.

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important! some quetions about mipi apply to imx6dl.

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guanliangding
Contributor III

Hi, all:

     Now, I have some trouble.

     <1> mipi-csi2 status is that, err1 = 0, err2 = 0, dphy_stat = 0x300 <-> 0x310. I think this is a correctly status.

     <2> I not to set csi2ipu register and mux register.

     <3> No interrupt to call function camera_call. It maybe the data flow is block. But i have no idea to debug it.

     <4> Framework is:

pastedImage_0.png

     <5> Follow is debug information.

In MVC: mxc_v4l_open

   device name is Mxc Camera

adv7282m 1-0021: adv7282m:ioctl_g_ifparm

adv7282m 1-0021: adv7282m:ioctl_g_fmt_cap

   Returning size of 720x625

End of mxc_v4l_open: v2f pix widthxheight 288 x 352

End of mxc_v4l_open: crop_bounds widthxheight 720 x 625

End of mxc_v4l_open: crop_defrect widthxheight 720 x 625

End of mxc_v4l_open: crop_current widthxheight 720 x 625

On Open: Input to ipu size is 720 x 625

imx-ipuv3 2400000.ipu: CSI_SENS_CONF = 0x00000A02

imx-ipuv3 2400000.ipu: CSI_ACT_FRM_SIZE = 0x027002CF

libphy: 2188000.ethernet:01 - Link is Up - 10/Full

adv7282m 1-0021: In adv7282m:ioctl_init

IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready

adv7282m 1-0021: adv7282m:ioctl_dev_init

Entering mipi_csi2_reset

Entering mipi_csi2_set_datatype

In free_run_mode

check dphy

In pr_csi2_info - mipi csi2 error1 reg is 0

In pr_csi2_info - mipi csi2 error2 reg is 0

In pr_csi2_info - mipi csi2 dphy status is 210

check dphy

In pr_csi2_info - mipi csi2 error1 reg is 0

In pr_csi2_info - mipi csi2 error2 reg is 0

In pr_csi2_info - mipi csi2 dphy status is 300

---------------------------------In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl 80685600

   case VIDIOC_QUERYCAP

------------------

Step 1: execuIn MVC:mxc_v4l_ioctl

te VIDIOC_QUERYCAP

------------In MVC: mxc_v4l_do_ioctl c0cc5604

---------------------------------   case VIDIOC_G_FMT

------

Driver name is mxc_v4l2

In MVC: mxc_v4l2_g_fmt type=1

   type is V4L2_BUF_TYPE_VIDEO_CAPTURE

End of mxc_v4l2_g_fmt: v2f pix widthxheight 288 x 352

End of mxc_v4l2_g_fmt: crop_bounds widthxheight 720 x 625

End of mxc_v4l2_g_fmt: crop_defrect widthxheight 720 x 625

End of mxc_v4l2_g_fmt: crop_current widthxheight 720 x 625

Current data format information:In MVC:mxc_v4l_ioctl

  width::288

  height:352

  pixeIn MVC: mxc_v4l_do_ioctl c0cc5605

   case VIDIOC_S_FMT

In MVC: mxc_v4l2_s_fmt

lformat : 842093913

  V4L2_PIX_FM   type=V4L2_BUF_TYPE_VIDEO_CAPTURE

End of mxc_v4l2_s_fmt: v2f pix widthxheight 320 x 240

T_YUV422P : 1345466932

  V4L2_PIXEnd of mxc_v4l2_s_fmt: crop_bounds widthxheight 720 x 625

End of mxc_v4l2_s_fmt: crop_defrect widthxheight 720 x 625

_FMT_YUV420 : 842093913

--------End of mxc_v4l2_s_fmt: crop_current widthxheight 720 x 625

---------------------------------In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c0145608

----------

Step 2: execute VIDIO   case VIDIOC_REQBUFS

C_S_FMT

------------------------In MVC:mxc_streamoff

---------------------------

----MVC: In mxc_free_frame_buf

---------------------------------In MVC:mxc_allocate_frame_buf - size=153600

--------------

Step 3: execute VIDIOC_REQBUFS

-----------------In MVC:mxc_v4l_ioctl

---------------------------------In MVC: mxc_v4l_do_ioctl c0445609

-

------------------------------   case VIDIOC_QUERYBUF

---------------------

Step 4: exIn MVC:mxc_v4l2_buffer_status

ecute VIDIOC_QUERYBUF

----------In MVC:mxc_mmap

---------------------------------   pgoff=0x44a00, start=0x76f32000, end=0x76f58000

--------

In MVC:mxc_v4l_ioctl

#### DEBUG: mmap: buffer[0] start address=0x76f32000

#### DEBUG:In MVC: mxc_v4l_do_ioctl c0445609

mmap: length=155648

   case VIDIOC_QUERYBUF

In MVC:mxc_v4l2_buffer_status

In MVC:mxc_mmap

   pgoff=0x44a40, start=0x76f0c000, end=0x76f32000

#### DEBUG: mmap: buffer[1] startIn MVC:mxc_v4l_ioctl

address=0x76f0c000

#### DEBUG: In MVC: mxc_v4l_do_ioctl c0445609

mmap: length=155648

   case VIDIOC_QUERYBUF

In MVC:mxc_v4l2_buffer_status

In MVC:mxc_mmap

   pgoff=0x44a80, start=0x76ee6000, end=0x76f0c000

#### DEBUG: mmap: buffer[2] startIn MVC:mxc_v4l_ioctl

address=0x76ee6000

#### DEBUG: In MVC: mxc_v4l_do_ioctl c0445609

mmap: length=155648

   case VIDIOC_QUERYBUF

In MVC:mxc_v4l2_buffer_status

In MVC:mxc_mmap

   pgoff=0x44ac0, start=0x76ec0000, end=0x76ee6000

#### DEBUG: mmap: buffer[3] startIn MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c044560f

   case VIDIOC_QBUF

address=0x76ec0000

#### DEBUG: In MVC:mxc_v4l_ioctl

mmap: length=155648

------------In MVC: mxc_v4l_do_ioctl c044560f

   case VIDIOC_QBUF

---------------------------------In MVC:mxc_v4l_ioctl

------

Step 5: execute VIDIOC_QBIn MVC: mxc_v4l_do_ioctl c044560f

UF

-----------------------------   case VIDIOC_QBUF

----------------------

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c044560f

   case VIDIOC_QBUF

---------------------------------In MVC:mxc_v4l_ioctl

------------------

Step 6: execuIn MVC: mxc_v4l_do_ioctl 40045612

te VIDIOC_STREAMON

-------------   case VIDIOC_STREAMON

---------------------------------In MVC:mxc_streamon

-----

IPU:In prp_enc_enabling_tasks

In prp_enc_setup

YUV422P

In prp: prp_enc_setup

csi2 ipu id = 0

csi2 csi id = 1

csi2 vc = 1

csi2 datatype = 0x1e

cam ipu id = 0

cam csi id = 1

imx-ipuv3 2400000.ipu: init channel = 19

imx-ipuv3 2400000.ipu: ipu busfreq high requst.

ipu_csi_init: csi id = 1, CSI_SENS_CONF = 0x2000a02, csi_dest = 2

imx-ipuv3 2400000.ipu: IPU_CONF = 0xA0000000

imx-ipuv3 2400000.ipu: IDMAC_CONF = 0x0000002F

imx-ipuv3 2400000.ipu: IDMAC_CHA_EN1 = 0x00000000

imx-ipuv3 2400000.ipu: IDMAC_CHA_EN2 = 0x00000000

imx-ipuv3 2400000.ipu: IDMAC_CHA_PRI1 = 0x18800001

imx-ipuv3 2400000.ipu: IDMAC_CHA_PRI2 = 0x00000000

imx-ipuv3 2400000.ipu: IDMAC_BAND_EN1 = 0x00000000

imx-ipuv3 2400000.ipu: IDMAC_BAND_EN2 = 0x00000000

imx-ipuv3 2400000.ipu: IPU_CHA_DB_MODE_SEL0 = 0x00000000

imx-ipuv3 2400000.ipu: IPU_CHA_DB_MODE_SEL1 = 0x00000000

imx-ipuv3 2400000.ipu: IPU_CHA_TRB_MODE_SEL0 = 0x00000000

imx-ipuv3 2400000.ipu: IPU_CHA_TRB_MODE_SEL1 = 0x00000000

imx-ipuv3 2400000.ipu: DMFC_WR_CHAN = 0x00000090

imx-ipuv3 2400000.ipu: DMFC_WR_CHAN_DEF = 0x202020F6

imx-ipuv3 2400000.ipu: DMFC_DP_CHAN = 0x00009694

imx-ipuv3 2400000.ipu: DMFC_DP_CHAN_DEF = 0x2020F6F6

imx-ipuv3 2400000.ipu: DMFC_IC_CTRL = 0x00000002

imx-ipuv3 2400000.ipu: IPU_FS_PROC_FLOW1 = 0x00000000

imx-ipuv3 2400000.ipu: IPU_FS_PROC_FLOW2 = 0x00000000

imx-ipuv3 2400000.ipu: IPU_FS_PROC_FLOW3 = 0x00000000

imx-ipuv3 2400000.ipu: IPU_FS_DISP_FLOW1 = 0x00000000

imx-ipuv3 2400000.ipu: IPU_VDIC_VDI_FSIZE = 0x00000000

imx-ipuv3 2400000.ipu: IPU_VDIC_VDI_C = 0x00000000

imx-ipuv3 2400000.ipu: IPU_IC_CONF = 0x00000000

imx-ipuv3 2400000.ipu: initializing idma ch 20 @ c0900500

imx-ipuv3 2400000.ipu: ch 20 word 0 - 00000000 0CA80000 0004BF00 E0000000 0003BC27

imx-ipuv3 2400000.ipu: ch 20 word 1 - 08960000 0112C000 2023C000 00006BC0 000000D7

imx-ipuv3 2400000.ipu: PFS 0x1,

imx-ipuv3 2400000.ipu: BPP 0x0,

imx-ipuv3 2400000.ipu: NPB 0xf

imx-ipuv3 2400000.ipu: FW 319,

imx-ipuv3 2400000.ipu: FH 239,

imx-ipuv3 2400000.ipu: EBA0 0x44b00000

imx-ipuv3 2400000.ipu: EBA1 0x44b00000

imx-ipuv3 2400000.ipu: Stride 431

imx-ipuv3 2400000.ipu: scan_order 0

imx-ipuv3 2400000.ipu: uv_stride 215

imx-ipuv3 2400000.ipu: u_offset 0x19500

imx-ipuv3 2400000.ipu: v_offset 0x25f80

imx-ipuv3 2400000.ipu: Width0 0+1,

imx-ipuv3 2400000.ipu: Width1 0+1,

imx-ipuv3 2400000.ipu: Width2 0+1,

imx-ipuv3 2400000.ipu: Width3 0+1,

imx-ipuv3 2400000.ipu: Offset0 23,

imx-ipuv3 2400000.ipu: Offset1 6,

imx-ipuv3 2400000.ipu: Offset2 0,

imx-ipuv3 2400000.ipu: Offset3 0

eba 44a00000

eba 44a40000

   ###################################### case VIDIOC_STREAMON

In MVC:mxc_poll

---------------------------------In MVC:mxc_v4l_ioctl

------------------

Step 7: execuIn MVC: mxc_v4l_do_ioctl c0445611

te read_frame

------------------   case VIDIOC_DQBUF

---------------------------------enc_counter = 0x0

#### Entering Function: read_frame...

---------------------------------------------------

Step 8: execute VIDIOC_DQBUF

---------------------------------------------------

###### buf = []

###### buf.offset = 0x998c, length=39460

###### buf.flags = 0In MVC:mxc_v4l_ioctl

x2baa4, bytesused=51

-----------In MVC: mxc_v4l_do_ioctl c044560f

---------------------------------   case VIDIOC_QBUF

-------

Step 9: execute write fiERROR: v4l2 capture: VIDIOC_QBUF: buffer already queued

le

-----------------------------In MVC:mxc_v4l_close

----------------------

##### bufIn MVC:mxc_streamoff

.index = 1

##### buffers[buf.index].start =0x76f0c000,  buffers[buf.index].length=155648.

---------------------------------------------------

Step 10: execute VIDIOC_QBUF

---------------------------------------------------

imx-ipuv3 2400000.ipu: CSI stop timeout - 5 * 10ms

imx-ipuv3 2400000.ipu: ipu busfreq high release.

In MVC:mxc_free_frames

mxc_v4l_close: release resource

MVC: In mxc_free_frame_buf

In MVC:mxc_free_frames

#### Leave Function: read_frame...\nCamera Done.

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Tags (3)
10 Replies

173 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi guanliang

for csi2ipu muxing and setting correct mipi frequency

please look at document on below link

Debug steps for customer MIPI sensor.docx 24.9 K

Some Experience When Enable MIPI Camera

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

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173 Views
guanliangding
Contributor III

Hi, igor:

     Thanks.

     <1> I think mipi-csi2 controller working correctly, and csi2ipu gasket not to setting, it will not block the data flow. At most , data format error.

     <2> You provide the document, I have a reference. But still no idea.

     <3> The error of "enc->counter = 0", can you give me some method to solve.

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qiang_li-mpu_se
NXP Employee
NXP Employee

For the MIPI virtual channel !=0 setting, you need reference to this sample code Sample code for iMX6 SabreSD to use MIPI CSI camera with virtual channel 3

And for MIPI interface TVin chip, in your driver, ioctl_g_ifparm(), it should be as followed:

static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p)
{
......

/* Initialize structure to 0s then set any non-0 values. */
memset(p, 0, sizeof(*p));
p->if_type = V4L2_IF_TYPE_BT656; /* This is the only possibility. */
p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT;
p->u.bt656.clock_curr=1;
p->u.bt656.bt_sync_correct = 1;

}

static int adv7282m_probe(struct i2c_client *client,

    const struct i2c_device_id *id)

{

......

adv7282m_data.sen.pix.priv = 0;

......

}

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guanliangding
Contributor III

Hi, Qiang Li:

     According the register value, we know data flow is CSI0->IC->IDMAC->BMEM. Because channel 20 be selected. But channel 20 can't trigger interrupt to get data. In a other word, it can't call function camera_callback to handle data. Have you ever meeting? Could you give me a debug direction? Thanks.

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qiang_li-mpu_se
NXP Employee
NXP Employee

The CSI_xxx registers are totally wrong from your dumpped information, I think you'd better use the mxc_v4l2_tvin.c test application to test the function of CSI->MEM capture first.

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173 Views
guanliangding
Contributor III

Hi, Qiang Li:

     In the normally capture mode, what is the right data flow in the IPU. What is the correctly dump information. And where can i download mxc_v4l2_tvin.c.

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173 Views
qiang_li-mpu_se
NXP Employee
NXP Employee

You can use my mxc_v4l2_tvin_isl79985.tar.gz. IPU capture the CSI video data to memory buffer directly, then draw it to frame buffer for preview.

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173 Views
guanliangding
Contributor III

Hi, Qiang Li:

     In ours debug process, we always meeting so much register haven't detail information in the RM. How can i to solve this problem.

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173 Views
guanliangding
Contributor III

Hi, Qiang Li:

     We haven't any monitor in ours system. So the preview mode is doesn't working.

173 Views
guanliangding
Contributor III

Hi, Qiang Li:

     In ours chip, output format is yuv422. so we don't need to care bt656 related setting.  And I dump part of IPU register. in follow:

imx-ipuv3 2800000.ipu: IPU_CONF =0x10000660
imx-ipuv3 2800000.ipu: IDMAC_CONF =0x0000002F
imx-ipuv3 2800000.ipu: IDMAC_CHA_EN1 =0x00800000
imx-ipuv3 2800000.ipu: IDMAC_CHA_EN2 =0x00000000
imx-ipuv3 2800000.ipu: IDMAC_CHA_PRI1 =0x18800001
imx-ipuv3 2800000.ipu: IDMAC_CHA_PRI2 =0x00000000
imx-ipuv3 2800000.ipu: IDMAC_BAND_EN1 =0x00000000
imx-ipuv3 2800000.ipu: IDMAC_BAND_EN2 =0x00000000
imx-ipuv3 2800000.ipu: IPU_CHA_DB_MODE_SEL0 =0x00000000
imx-ipuv3 2800000.ipu: IPU_CHA_DB_MODE_SEL1 =0x00000000
imx-ipuv3 2800000.ipu: IPU_CHA_TRB_MODE_SEL0 =0x00800000
imx-ipuv3 2800000.ipu: IPU_CHA_TRB_MODE_SEL1 =0x00000000
imx-ipuv3 2800000.ipu: DMFC_WR_CHAN =0x00000090
imx-ipuv3 2800000.ipu: DMFC_WR_CHAN_DEF =0x202020F6
imx-ipuv3 2800000.ipu: DMFC_DP_CHAN =0x0000968A
imx-ipuv3 2800000.ipu: DMFC_DP_CHAN_DEF =0x2020F6F6
imx-ipuv3 2800000.ipu: DMFC_IC_CTRL =0x00000002
imx-ipuv3 2800000.ipu: IPU_FS_PROC_FLOW1 =0x00000000
imx-ipuv3 2800000.ipu: IPU_FS_PROC_FLOW2 =0x00000000
imx-ipuv3 2800000.ipu: IPU_FS_PROC_FLOW3 =0x00000000
imx-ipuv3 2800000.ipu: IPU_FS_DISP_FLOW1 =0x00000000
imx-ipuv3 2800000.ipu: IPU_VDIC_VDI_FSIZE =0x00000000
imx-ipuv3 2800000.ipu: IPU_VDIC_VDI_C =0x00000000
imx-ipuv3 2800000.ipu: IPU_IC_CONF =0x00000000
imx-ipuv3 2800000.ipu: IPU_CONF =0x10000660
imx-ipuv3 2800000.ipu: IPU_INT_CTRL_1 =0x80100000
imx-ipuv3 2800000.ipu: IPU_INT_STAT_1 =0x00800000
imx-ipuv3 2800000.ipu: CSI0_SENS_CONF =0xE88551AC
imx-ipuv3 2800000.ipu: CSI0_SENS_FRM_SIZE =0x68AAB81F
imx-ipuv3 2800000.ipu: CSI0_ACT_FRM_SIZE =0x31491660
imx-ipuv3 2800000.ipu: CSI0_MIPI_DI =0xC8385955
imx-ipuv3 2800000.ipu: CSI1_SENS_CONF =0x4950C063
imx-ipuv3 2800000.ipu: CSI1_SENS_FRM_SIZE =0x0984375F
imx-ipuv3 2800000.ipu: CSI1_ACT_FRM_SIZE =0xF8112AD6
imx-ipuv3 2800000.ipu: CSI1_MIPI_DI =0x7C80482A
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