iMX8mq MIPI DSI LCD display error

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iMX8mq MIPI DSI LCD display error

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Contributor I

We are going to make product based on IMX8MQ (MIMX8MQ6DVAJZAA) processor.  Currently we are doing POC on IMX8MQ processor EVK.

 

  • We have connected MIPI DSI LCD (800 x 1280) to CPU MIPI-DSI interface.
  • We have connected  lcd directly using DSI interface provided on IMX8MQ EVK.
  • To verify this setup we are using "fsl-imx8mq-evk-dcss-rm67191.dtb".  We have modified this device tree to support LCD panel we are using.  Following is snippet of device tree modification.
&lcdif {
    status = "okay";
    max-res = <800>, <1280>;

    port@0 {
        lcdif_mipi_dsi: mipi-dsi-endpoint {
            remote-endpoint = <&mipi_dsi_in>;
        };
    };
};

&mipi_dsi_phy {
    status = "okay";
};

&mipi_dsi {
    status = "okay";
    as_bridge;
    sync-pol = <1>;
    //pwr-delay = <10>;
     port@1 {
        mipi_dsi_in: endpoint {
            remote-endpoint = <&lcdif_mipi_dsi>;
        };
    };
};
&mipi_dsi_bridge {
    status = "okay";
    panel@0 {
        compatible = "zs101,ne4031";
        reg = <0>;
        reset-gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
       enable-gpio = <&gpio3 18 GPIO_ACTIVE_HIGH>;
        dsi-lanes = <4>;
        panel-width-mm = <140>;
        panel-height-mm = <220>;
                status = "okay";
                bl-gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
                default-on;
       display-timings {
            timing {
                //clock-frequency = <69500000>;
                                clock-frequency = <69500000>;
                hactive = <800>;
                vactive = <1280>;
                hfront-porch = <15>;
                hsync-len = <1>;
                hback-porch = <48>;
                vfront-porch = <5>;
                vsync-len = <1>;
                vback-porch = <3>;
                hsync-active = <0>;
                vsync-active = <0>;
                de-active = <0>;
                pixelclk-active = <0>;
            };
        };

                port {
            panel1_in: endpoint {
                remote-endpoint = <&mipi_dsi_bridge_adv>;
            };
        };

    };
    port@2 {
        mipi_dsi_bridge_adv: endpoint {
            remote-endpoint = <&panel1_in>;
        };
    };

};

 

Following is snippet of driver change: (drivers/gpu/drm/panel/panel-ilitek-ili9881c.c)

        dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_VIDEO_HSE;
        dsi->format = MIPI_DSI_FMT_RGB888;
        dsi->lanes = 4;

  • Issue is we are getting clock coming out of IMX8MQ processor or DSI interface of processor . And There is some data on data lanes. LCD have display. But the display is not normal, display is crashed. Details refer to attached image.

 

Are we missing anything? Any suggestion or direction will be appreciated.  As we are in critical phase of our project any help will be appreciated to proceed further.

 

Let me know if any information is required from us.

 

Thanks,

Ducan

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NXP TechSupport
NXP TechSupport

Hi Ducan

one can try with latest L5.4.3 kernel and adjust struct drm_display_mode default_mode

and panel initialization according to its datasheet in struct cmd_set_entry manufacturer_cmd_set[]

panel-raydium-rm67191.c\panel\drm\gpu\drivers - linux-imx - i.MX Linux kernel 

Best regards
igor
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