iMX8MQ EVK board LPDDR4 issue

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iMX8MQ EVK board LPDDR4 issue

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Contributor IV

Hi,

 

Release: Yocto-Morty (4.9.51_GA)

Board: i.MX8MQ EVK

I want to know at which frequency LPDDR4 is working on iMX8MQ EVK board?

I have downloaded LPDDR4 RPA from iMX8MQ DDR stress tool v2.1 and generated ddr_init.c & ddrphy_train.c with same configurations for 3GB DDR on iMX8MQ EVK board.

Observations:

1) Using default ddr_init.c & ddrphy_train.c files in u-boot, system boot ups properly.

2) After changing ddr_init.c & ddrphy_train.c files which are generated from DDR stress tool, board boot up stuck at the kernel level. We are using the EVk only & only these two files are changed.

Can you please provide your inputs. I have attached files which I was taken as reference for DDR configurations. Also, I have attached ddr_init.c & ddrphy_train.c files which I have used for both cases.

(NOTE: Calibrations are passed successfully with these changes)

Regards,

Nirmal

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2 Replies

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NXP TechSupport
NXP TechSupport

Hi Nirmal

recommended to use Linux L4.14.78_1.0.0   Uboot v2018.03
linux-imx - i.MX Linux kernel 

uboot-imx - i.MX U-Boot 

Regarding frequency, it is 1600MHz as mentioned in MX8M_LPDDR4_register_programming_aid_EVK_preliminiary_v21.xlsx :
part MT53B768M32
 set    0x30360068    32    0x00f5a406    #HW_DRAM_PLL_CFG2_ADDR:
For 1600MHz DDR speed, Configure DRAM PLL for 800MHz operation,
DDRC PHY PLL multiplies the input frequency by 2 to generate the DDR clock.
# The RPA provides the HW_DRAM_PLL_CFG2_ADDR register (0x30360068) setting for
1600Mhz (0x00ece580), as well as a few other frequency examples.        

Best regards
igor
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13 Views
Contributor IV

Hello Igor,

Thanks for your quick response.

It looks like this is a DDR stress tool v2.1 issue because as I generated files from the DDR stress tool v1.11 and using MX8M_LPDDR4_register_programming_aid_EVK_preliminiary_v18.xlsx it worked properly for 1600 MHz operating frequency.

Best regards,

Nirmal

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