Dear Community,
In drivers/staging/media/imx/imx8-mipi-csi2-sam.c, I would like to have below function to show MIPI-CSI2 related registers during streaming :
static void dump_csis_regs(struct csi_state *state, const char *label)
{
struct {
u32 offset;
const char * const name;
} registers[] = {
{ 0x00, "CSIS_VERSION" },
{ 0x04, "CSIS_CMN_CTRL" },
{ 0x08, "CSIS_CLK_CTRL" },
{ 0x10, "CSIS_INTMSK" },
{ 0x14, "CSIS_INTSRC" },
{ 0x20, "CSIS_DPHYSTATUS" },
{ 0x24, "CSIS_DPHYCTRL" },
{ 0x30, "CSIS_DPHYBCTRL_L" },
{ 0x34, "CSIS_DPHYBCTRL_H" },
{ 0x38, "CSIS_DPHYSCTRL_L" },
{ 0x3C, "CSIS_DPHYSCTRL_H" },
{ 0x40, "CSIS_ISPCONFIG_CH0" },
{ 0x50, "CSIS_ISPCONFIG_CH1" },
{ 0x60, "CSIS_ISPCONFIG_CH2" },
{ 0x70, "CSIS_ISPCONFIG_CH3" },
{ 0x44, "CSIS_ISPRESOL_CH0" },
{ 0x54, "CSIS_ISPRESOL_CH1" },
{ 0x64, "CSIS_ISPRESOL_CH2" },
{ 0x74, "CSIS_ISPRESOL_CH3" },
{ 0x48, "CSIS_ISPSYNC_CH0" },
{ 0x58, "CSIS_ISPSYNC_CH1" },
{ 0x68, "CSIS_ISPSYNC_CH2" },
{ 0x78, "CSIS_ISPSYNC_CH3" },
};
u32 i;
v4l2_dbg(2, debug, &state->sd, "--- %s ---\n", label);
for (i = 0; i < ARRAY_SIZE(registers); i++) {
u32 cfg = mipi_csis_read(state, registers[i].offset);
v4l2_dbg(2, debug, &state->sd, "%20s[%x]: 0x%.8x\n", registers[i].name, registers[i].offset, cfg);
}
}
For that purpose, I add mxc-mipi-csi2-sam.debug=2 to following u-Boot's environment variable :
u-boot=> setenv mmcargs "setenv bootargs ${jh_clk} console=${console} root=${mmcroot} mxc-mipi-csi2-sam.debug=2"
which becomes :
mmcargs=setenv bootargs console=ttymxc1,115200 root=/dev/mmcblk1p2 rootwait rw mxc-mipi-csi2-sam.debug=2
Then I saveenv and boot but nothing shows when streaming.
Could you point out what is missing, please ?
Thanks in advance,
Khang
解決済! 解決策の投稿を見る。
I found the solution here : https://community.nxp.com/t5/i-MX-Processors/isp-vvcam-Crash-at-lt-sensor-gt-ioc-qcap/m-p/1312271
I found the solution here : https://community.nxp.com/t5/i-MX-Processors/isp-vvcam-Crash-at-lt-sensor-gt-ioc-qcap/m-p/1312271