iMX8MP IBIS model to be used with Hyperlynx

[pregache]

Hello, we are setting up a Hyperlynx simulation to check the integrity of our LPDDR4 interface.

The IBIS model we get from NXP design support document includes a R/L/C package parasitic per pin, but there is no associated delay. On the other hand, delays are given in "IMX8MPHDG - M Plus Hardware Developer's Guide".

How are we suppose to proceed ? Hack the IBIS file ? Is there a S-param file available to fully model the package ? Add delays (from the HW developper's guide) directly into the Hyperlynx tools ?

Regards

Pascal

[JosephAtNXP · Accepted solution]

Hi,

Thank you for your interest in NXP Semiconductor products,

Pin delay is not a required information in IBIS model according to the IBIS specification. As said, if needed is found at HDG.

It can be estimated from the L_pin and C_pin values that are listed for each relevant pin in the IBIS model by using the following equation:

delay = sqrt(L_pin x C_pin)

Therefore, as such, delay of the pins is included in the IBIS model, though not in a direct form.

You could also use XMI calculation, there aren't S-params,

Regards

[pregache]

Thank you very much.

For the fun, I checked Td and Z parameters in the IBIS file of the memory and they perfectly match sqrt(L* C) and sqrt (L/C), as if they are simply computed from teh R/L/C parasitics.

Pascal