iMX8MN: U-Boot does not work with 64MiB SPI NOR flash

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iMX8MN: U-Boot does not work with 64MiB SPI NOR flash

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swendt38
Contributor II

Hi, we are using i.MX8M Nano with U-Boot 2020.04 and our design is custom but based on DDR4 Audio board 2.0.

Our QSPI NOR flash is a n25q512a from Micron and is supported by U-Boot in general.

 

So far everything looks ok except that we can not properly access addresses beyond the lower 32 Megabytes (so >0x02000000).

When we boot from SPI flash and try to access the higher addresses, we run into a reset.

When we boot from USB (using uuu), we do not get a reset but the content of those upper 32 Megabytes is rubbish.

Using Linux we can access the entire flash range without restrictions.

It seems there is a limitation (e.g. memory mapping) for iMX8MN and U-Boot accessing addresses >32MiB on SPI NOR flashes.

Does anybody know a reason ?

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1 Solution
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swendt38
Contributor II

Hi,

 

I found the issue - the flash size is not taken from the SPI NOR ID table but has to be defined separately inside imx8mn_ab2.h which is of course not very nice but looks like solves my issue.

 

Regards,

Sebastian

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4 Replies
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igorpadykov
NXP Employee
NXP Employee

Hi Sebastian

 

for that issue one can try to enable 4-byte address mode (3-byte is used by default)

which can be enabled through the nonvolatile configuration register. Details can be found

in n25q512a datasheet.

 

Best regards
igor

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swendt38
Contributor II

Hi Igor,

thanks for your reply.

I assume we are already using 4-Byte addressing because we can access addresses >16MiB (which exceeds 3-Byte address range).

I suspect the issue is more related to mapping the QSPI flash addresses to the memory range of the iMX8MN.

Regards,

Sebastian

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837 Views
swendt38
Contributor II

Hi,

 

I found the issue - the flash size is not taken from the SPI NOR ID table but has to be defined separately inside imx8mn_ab2.h which is of course not very nice but looks like solves my issue.

 

Regards,

Sebastian

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swendt38
Contributor II

Same issue is valid for eMMC - but here offset is 32KiB.

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