iMX8M-plus: unable to separate memory between cortex a53 cores

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

iMX8M-plus: unable to separate memory between cortex a53 cores

623 Views
Na-veen
Contributor II

Hi,

Is is possible to separate memory between a53 cores?

Could you share me some reference documents?

 

Thanks,

Naveen

Labels (1)
Tags (1)
0 Kudos
3 Replies

612 Views
Yuri
NXP Employee
NXP Employee

@Na-veen 
Hello,

  The i.MX8MP Cortex-A53 is a cluster of four cores, each with an L1 memory
system and a single shared L2 cache. Generally all cores are intended
to operate together. We do not support solutions to separate memory
between A53 cores. Customers can try using virtualization - Jailhouse.

Regards,
Yuri.

0 Kudos

595 Views
Na-veen
Contributor II

@Yuri Thank you for the response.

As per the Cortex A53 techical reference manual, each a53 core has it's own MMU and MMU in each core has some features.

Then,

1. When each core has its own MMU, why can't we allocate memory to each core?

2. Would be greatfull if you provide how MMU on each core works? and waht is intent of having each MMU when memory separation is not supported?

3. How MMU is configured?

 

TIA,

Nav

0 Kudos

583 Views
Yuri
NXP Employee
NXP Employee

@Na-veen 
Hello,

   We do not have examples to separate memory between A53 cores. Sorry.

Regards,
Yuri.

0 Kudos