iMX8M Nano: SNVS LPGPR

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iMX8M Nano: SNVS LPGPR

2,325 Views
wooosaiiii
Contributor III

Hi all,

I am trying to write a value to SNVS LPGPR0 register on i.MX8M Nano SoC.

However register doesn't accept my values, in fact  they always stay at 0x00000000 (default).

Here is my test procedure:

U-Boot > mw 0x30370068 0xDEADBEEF  
U-Boot > md 0x30370068 1           
30370068: 00000000                               ....
U-Boot > 

 Where address 0x30370068 is the address of SNVS_LP General Purpose Register 0 (legacy alias) (LPGPR0_legacy_alias).

The same can be observed if using registers "SNVS_LP General Purpose Registers 0 .. 3 (LPGPR0 - LPGPR3)":

U-Boot > mw 0x30370090 0xDEADBEEF 
U-Boot > mw 0x30370094 0xDEADBEEF
U-Boot > mw 0x30370098 0xDEADBEEF
U-Boot > mw 0x3037009C 0xDEADBEEF
U-Boot > md 0x30370090 4         
30370090: 00000000 00000000 00000000 00000000    ................
U-Boot >

What am I missing?

The same works like a charm on i.MX6UL board which should have the same SNVS controller?

ps.: here is a dump of entire controller registers:

30370000: 00000001 00002020 00000000 00000000    ....  ..........
30370010: 00000000 8000bd00 80000000 00000000    ................
30370020: 00000000 00000000 00000000 00000000    ................
30370030: 00000000 00000000 00000020 00000000    ........ .......
30370040: 00000000 00000000 00000000 00000008    ................
30370050: 00000000 00000000 00000000 00000000    ................
30370060: 00000000 00000000 00000000 00000000    ................
30370070: 00000000 00000000 00000000 00000000    ................
30370080: 00000000 00000000 00000000 00000000    ................
30370090: 00000000 00000000 00000000 00000000    ................

 

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9 Replies

2,251 Views
M_J
Contributor I

Hi @wooosaiiii ,
Have you found solution for your issue?
We are facing the same problem on i.MX8M

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2,239 Views
wooosaiiii
Contributor III

Yes, we have solved the issue.

Basically, you need to write the init value and clear the low-voltage event:

 

#define IMX8M_SNVS_LPLVDR	(0x30370064)
#define IMX8M_SNVS_LPSR 	(0x3037004C)
#define IMX8M_SNVS_LPLVDR_INIT_VAL	(0x41736166)
#define IMX8M_SNVS_LPSR_CLEAR_EVENT	(0x00000008)	

     /**
	 * First write initialisation value to SNVS LPLVDR Digital Low-Voltage
	 * Detector Register and then clear the Low-Voltage Event Record in the
	 * SNVS LPSR Status Register
	 */
	*(volatile uint32_t *) IMX8M_SNVS_LPLVDR = IMX8M_SNVS_LPLVDR_INIT_VAL;
	*(volatile uint32_t *) IMX8M_SNVS_LPSR = IMX8M_SNVS_LPSR_CLEAR_EVENT;

Last but not least, if you're using HAB features, you will need to enable access to privileged registers.

 

 

2,103 Views
wouher
Contributor II

Could you comment on how you enabled access to privileged registers when using HAB features?

Because I can write to e.g. the LPGPR using the method described in this thread, but only when HAB is disabled.

 

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wooosaiiii
Contributor III

Call init_snvs() in arch_cpu_init().

Use init_snvs() from i.MX7 arch.

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wouher
Contributor II

Thanks, that's it

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2,093 Views
M_J
Contributor I

We haven't done anything special, just write a value under casted GPR register.

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2,302 Views
wooosaiiii
Contributor III

Hi @igorpadykov ,

I tried using registers SNVS LPGPR alias registers @ 0x90 - 0x9C, see:

The same can be observed if using registers "SNVS_LP General Purpose Registers 0 .. 3 (LPGPR0 - LPGPR3)":

U-Boot > mw 0x30370090 0xDEADBEEF 
U-Boot > mw 0x30370094 0xDEADBEEF
U-Boot > mw 0x30370098 0xDEADBEEF
U-Boot > mw 0x3037009C 0xDEADBEEF
U-Boot > md 0x30370090 4         
30370090: 00000000 00000000 00000000 00000000    ................
U-Boot >

without success...

 

RM says that those registers cannot be programmed when:

When GPR_SL or GPR_HL bit is set, the register cannot be programmed.

 

Can you tell which register has those two bits as we cannot find them in the RM?

Thanks

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igorpadykov
NXP Employee
NXP Employee

>Can you tell which register has those two bits as we cannot find them in the RM?

 

they can be found in SNVS_HP Lock Register (HPLR), SNVS_LP Lock Register (LPLR) described in

Security Reference Manual for i.MX 8M Nano Applications Processor

 

Best regards
igor

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2,317 Views
igorpadykov
NXP Employee
NXP Employee

Hi Primoz

 

recommended to use SNVS LPGPR alias registers @ 0x90 - 0x9C.

 

Best regards
igor

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