iMX8M + Micron LPDDR4 - target trace impedances

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iMX8M + Micron LPDDR4 - target trace impedances

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NathanSmith
Contributor I

We are using an iMX8M connected to a Micron MT53B768M32 similar to the EVK.  We are attempting to fix a board problem that our design consultant left for us.  In review of the hardware developers guide (Rev 1, section 3.4.2) there is a reference that the DQ and DMI signals should be 42 ohm instead of 50 ohm.  I infer from this that the command bus should have a target trace impedance of 50 ohm.  Other vendors seem to indicated best practice is to design both buses for 42 ohm, or 40 ohm in some instances.

Can anyone share best practice / experience for the command bus target impedance?

Can you verify my target design impedance are correct per this list?

CK_t/CK_c, DQSx_t/DQSx_c (clock pairs) : 85 ohm differential

CA, CS, CKEx : 50 ohm  (should this be 42 ohm?)

DQ, DM : 42 ohm

 

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NathanSmith
Contributor I

Thanks.  Is there a technical references that explains why the command bus should be 50 ohm?  I have not been able to find anything in the iMX8MQ datasheet, users manual or the errata explaining this.  In the range near 50 ohm, the Micron LPDDR4 only supports an ODT of 60 ohm, 48 ohm and 40 ohm  (Zq=240, 240ohm/4, 240/5 and 240/6 respectively).  The iMX8 command bus ATxInpedance references only 60 ohm and 40 ohm driver (real) impedance.  This would be creating a mismatch in either case from an insertion standpoint (60ohm gamma -0.09, 40ohm gamma 0.11).  For a low power application this seems wasteful while compromising an optimal eye size.  Even with tolerance from the board fab this doesn't seem to follow best practice.  What am I missing?

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nxf63675
NXP TechSupport
NXP TechSupport

Hi NathanSmith,

 

Well, We do not have a specific guide as you said, but you may refer to our EVK design and use it for yours, sometimes the customers refer to our designs to use it in theirs; you can find it on the next link:

https://www.nxp.com/webapp/Download?colCode=MCIMX8M-EVKB-DESIGNFILES&appType=license

 

Regards,

Israel.

 

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nxf63675
NXP TechSupport
NXP TechSupport

Hi NathanSmith,

 

CK_t/CK_c, DQSx_t/DQSx_c (clock pairs) : 85 ohm differential
Yes, it is correct.

CA, CS, CKEx: 50 ohm (should this be 42 ohm?)
As these signals have not a specific impedance value on the Hardware developers guide it should be 50 ohms.

DQ, DM: 42 ohm
Also yes, this is correct.

 

Hope this helps you.

Regards,

Israel.

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