iMX8 General Purpose OTP

[rlumo]

Does iMX8 has a general purpose OTP? I checked iMX7 and it has 128bit of General purpose OTP, is there a corresponding fuse for iMX8? 

[msalvinik]

Hi all,

according to the reference manual, for the i.MX8QM the general purpose space in fuses seems limited to two words of 32bit each (64bit total).

Is there other space over the 24Kbit fuses memory that can be used as a general purpose memory?

For example, on i.MX8M there are 512 bits usable as general purpose area.

@joanxie  in your previous comment you said

"The SOC team is discussing what OCOTP fuse bits they can designate for customer use. This is a major problem, particularly for the i.MX8QM." it seems that the SOC team is still under discussion, the customer needs to wait for the official reference manual to be published

Are there any updates on this?

Thanks in advance, regards.

Mauro

[marcocavallini]

Into i.MX8 Quad Max according to the RM there are only 64bits available to the user, 2x32 bit words.
See page 214 of the Quad Max reference manual.
There are no other non volatile memories which could be used.
In case one can consider security fuses (if security is not used): OEM SRK -OEM_HASH,
SECO KEY.

Marco Cavallini | KOAN sas
Bergamo - Italia
embedded software engineering
✆:+39 035-255.235
https://KoanSoftware.com

[joanxie]

do you mean OCOTP in the chapter 6.4.1.1 Features of imx7d Reference Manual? if no, send me the doc you mean General purpose OTP

[rlumo]

Hi Joan,

Thanks for the reply. Yes, for the imx7d that is what I meant.

I am trying to ask if imx8 has the same general purpose OCOTP?

Cheers.

[joanxie]

yes, IMX8QM has it, I attached this from imx8qm reference manual:

The OCOTP provides the following features :
• 32-bit word restricted program and read to one 8kbit eFuse OTP and one 16kbit
eFuse OTP. 8k eFuse OTP consists of 256 user fuse words and 16 supplementary
fuse words. 16k eFuse OTP consists of 512 user fuse words and 16 supplementary
fuse words.
• Loading and housing of fuse content into shadow registers.
• Memory-mapped (restricted) access to shadow registers.
• Generation of HWV_FUSE (hardware visible fuse bus) and the HWV_REG bus
which is made of up of volatile PIO register based "fuses". The HWV_REG bits
come from the SCS (Software Controllable Signals) register.
• Generation of STICKY_REG which consists of sticky register bits.
• Provides program-protect and read-protect eFuse.
• Provides override and read protection of shadow register.
• Supports ECC mode programming and reading for MTR fuse words by SkyBlue IPS
bus.
• Supports ECC mode programming and reading for all the user fuse words except 128
Monotonic fuse words in 16K efuse OTP.
• Supports redundancy mode programming and reading for all the supplementary fuse
words and 128 Monotonic fuse words in 16K efuse OTP

[rlumo]

Hi Joan,

Thanks for the reply. Yes, I have read this on the manual, but when I checked the fuse map, there is no general purpose OTP in the map, unless otherwise it is named differently. If it does exist with iMX 8qm as you have indicated, can you please advise me what is the fuse row index that can be used as general purpose?

For example, MAC1_ADDRESS fuse row index is from 708-709. What is then the General Purpose OTP fuse row index as you have indicated?

Looking forward for your reply. Thank you very much.

[joanxie]

The OTP memory (Fuse box) is controlled by the OCOTP CTRL block, which reads the actual use bits and distributes them via software readable path or as hardwired signals. On i.MX8/8x the fuses are organized in fuse arrays instead of fuse banks and words.

The fuse array has a certain size and an associated supplementary array (16 Words), this determine the number of words available on each device.

• 8K fuse array: The 8K array consist of a 16 words supplementary array and a 256 words (8x1024 bits) main array, total of 272 words.
• 16K fuse array: The 16K array consist of a 16 words supplementary array and a 512 words (16x1024 bits) main array, total of 528 words.

[rlumo]

Thank you for describing the OCOTP CTRL Block. But you have not actually answered my original question. Can you please tell me what is the fuse row index of the General Purpose OTP in the fuse map for iMX8?

I have attached the fuse map for the iMX8. Can you let me know which fuse row index I can use to store user defined configurations (General Purpose OTP)?

[rlumo]

[joanxie]

"The SOC team is discussing what OCOTP fuse bits they can designate for customer use. This is a major problem, particularly for the i.MX8QM." it seems that the SOC team is still under discussion, the customer needs to wait for the official reference manual to be published

[fmonte]

Any update on this?

[clementperon]

Hi @joanxie ,

I have also a need to use some OCOTP bits for our usage.

Do you know when this will be discussed / officially published ?

Thanks,

[Terry3]

HI @joanxie,

Have you guys figured it out for i.MX8QM?

Do you have an ETA for an imx8qm fuse map?

Thanks

[sezergin]

Any update? I need to have OCOTP mapping of the mac fuses to be able to burn 2 mac addresses on my NXP iMX8DXP.

[sezergin]

According to https://imxdev.gitlab.io/tutorial/Burning_eFuses_on_i.MX8_and_i.MX8x_families/

On iMX8DXP to burn the following MACs to:
eth0: 00:26:b1:ff:00:01
eth1: 00:26:b1:ff:00:02

We would need the following:

fuse prog -y 0 708 0xb1ff0001
fuse prog -y 0 709 0x00000026
fuse prog -y 0 710 0xb1ff0002
fuse prog -y 0 711 0x00000026

Has not yet verified it with the board.
Does the mapping look good for anyone who has done this before?

[andreasregel]

I just tried on an iMX8DX: The OTP area needs the MAC address reversed, so you have to:

fuse prog -y 0 708 0xffb12600
fuse prog -y 0 709 0x00000100
fuse prog -y 0 710 0xffb12600
fuse prog -y 0 711 0x00000200