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iMX8 Family DisplayPort

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sbertrand
Contributor III

Hi,

I would like to better understand DisplayPort support on the iMX8 product family.

The imx-yocto-L4.14.98_2.0.0_ga release documentation i.MX Linux Reference Manual present HDMI Support for i.MX 8M Quad and i.MX 8QuadMax as "HDMI 2.0/Display Port 1.3 on chip".

Is there a difference between the iMX8M and iMX8 series HDMI/DisplayPort subsystem ?

When building the boot firmware for iMX8M, I notice reference to HDMI / DisplayPort :

- ./mkimage_imx8 -fit -signed_hdmi signed_dp_imx8m.bin

- ./mkimage_imx8 -fit -signed_hdmi signed_dp_imx8m.bin 

Are those firmware and initialization specific to the iMX8M (Mscale) ?

The iMX8QuadMax imx-mkimage has reference to hdmitxfw.bin and hdmirxfw.bin. The firmware-imx bundle has hdmitxfw.bin, hdmirxfw.bin and dpfw.bin. The dpfw.bin is not referenced by imx-mkimage.

Is a firmware required to enabled displayport on iMX8QM ?

Is dpfw.bin required to enable displayport on iMX8QuadMax (iMX8QM) ?

Is the difference in firmware due to a difference in HDMI/DisplayPort subsystem ?

Is the difference in firmware due to a difference in the SoC family ( iMX8M (MSCALE) vs iMX8 ) ?

Regards,

Stan

19 Replies

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gor_kh
Contributor I

Hello all,

 

@gsa Did you find the correct dtb for imx8mq? and what about lane mapping values?

 

I have problem with DP port, I used signed_dp .... firmware. here is a piece of my dmesg. Could someone help me please?

 

 

i2c i2c-4: of_i2c: modalias failure on /hdmi@32c00000/port@0
[ 0.317142] i2c i2c-4: Failed to create I2C device for /hdmi@32c00000/port@0
[ 0.317151] [drm] Failed to get HDCP config - using HDCP 2.2 only
[ 0.317212] [drm] Failed to initialize HDCP
[ 0.318608] [drm] hdmi-audio-codec driver bound to HDMI
[ 0.318622] imx-drm display-subsystem: bound 32c00000.hdmi (ops imx_hdp_imx_ops)
[ 0.329369] [drm] dp_get_edid_block (ret = 0) block 0
[ 0.340012] [drm] dp_get_edid_block (ret = 0) block 0
[ 0.350656] [drm] dp_get_edid_block (ret = 0) block 0
[ 0.361294] [drm] dp_get_edid_block (ret = 0) block 0
[ 0.361302] imx-drm display-subsystem: DP-1: EDID is invalid:
[ 0.361310] [00] BAD 00 20 00 00 00 10 74 00 00 00 00 00 00 00 00 00
[ 0.361315] [00] BAD 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[ 0.361319] [00] BAD 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[ 0.361324] [00] BAD 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[ 0.361328] [00] BAD 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[ 0.361332] [00] BAD 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[ 0.361337] [00] BAD 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[ 0.361342] [00] BAD 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[ 0.361349] i.mx8-hdp 32c00000.hdmi: failed to get edid, use default video modes
[ 0.381101] [drm] asserted HDP PHY reset
[ 0.381169] [drm] pixel engine reset
[ 0.381186] [drm] CDN_*_Write_Register_blocking ... setting LANES_CONFIG c6
[ 0.381242] Wait for A3 ACK
[ 0.383649] [drm] AFE_init
[ 0.383652] [drm] deasserted HDP PHY reset
[ 0.383740] Wait until PHY_HDP_CLK_CTL[bit 1] != 0
[ 0.384261] Wait for A2 ACK
[ 0.405877] [drm] AFE_power exit
[ 0.405887] [drm] CDN_API_DPTX_SetVideo_blocking (ret = 0)
[ 0.405889] [drm] dp_mode_set()
[ 0.405895] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.411835] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.417766] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.423699] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.429633] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.435566] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.441500] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.447436] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.453368] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.459302] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.465238] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.471169] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.477103] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.483037] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.488971] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.494905] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.500841] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.506774] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.512711] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.518640] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.524578] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.530508] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.536445] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.542376] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.548313] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.554245] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.560179] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.566112] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.572046] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.577980] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.583912] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.589848] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 0.595170] [drm] Failed to Get DP link ID: -71

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sbertrand
Contributor III

This is an update to I2C operation over Aux for the iMX8 native displayport.

For imx8qm, the firmware needs to be updated to version 26098 or 32955.

[ 1.900048] [drm] CDN_API_General_getCurVersion - ver 26098 verlib 20691
[ 1.899414] [drm] CDN_API_General_getCurVersion - ver 32955 verlib 20691

Once updated, the patch attached can enable I2C communication over Aux. 

root@quicksilver:~# i2ctransfer -y imx_dp_aux w1@0x50 0x7 r1
[ 118.995256] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[ 119.001750] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[ 119.008431] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[ 119.014887] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[ 119.021539] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
0x00
root@quicksilver:~# i2ctransfer -y imx_dp_aux r1@0x50
[ 122.594930] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[ 122.601465] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[ 122.608123] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
0x10

However, I2C read failure leads to unrecoverable error.

root@quicksilver:~# i2ctransfer -y imx_dp_aux w1@0x52 0x7 r1
[ 136.786266] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[ 136.792797] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[ 136.799384] [drm] dp_aux_transfer() msg->request 0x0 msg->size 0x0
Error: Sending messages failed: Remote I/O error
root@quicksilver:~# i2ctransfer -y imx_dp_aux r1@0x52
[ 143.729652] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[ 143.736195] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[ 145.241401] i.mx8-hdp 56268000.hdmi: CDN_API_DPTX_I2C_Read_blocking status 1
[ 145.248455] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
[ 146.753117] i.mx8-hdp 56268000.hdmi: CDN_API_DPTX_I2C_Read_blocking status 1
Error: Sending messages failed: Input/output error
root@quicksilver:~# i2ctransfer -y imx_dp_aux w1@0x50 0x7 r1
[ 159.587205] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[ 161.090864] i.mx8-hdp 56268000.hdmi: CDN_API_DPTX_I2C_Write_blocking status 1
[ 161.098008] [drm] dp_aux_transfer() msg->request 0x0 msg->size 0x0
[ 162.602655] i.mx8-hdp 56268000.hdmi: CDN_API_DPTX_I2C_Write_blocking status 1
Error: Sending messages failed: Input/output error
root@quicksilver:~# i2ctransfer -y imx_dp_aux r1@0x50
[ 167.434005] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[ 168.937859] i.mx8-hdp 56268000.hdmi: CDN_API_DPTX_I2C_Read_blocking status 1
[ 168.944914] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
[ 170.449676] i.mx8-hdp 56268000.hdmi: CDN_API_DPTX_I2C_Read_blocking status 1
Error: Sending messages failed: Input/output error

I2C write on an invalid address reports correct failure.

I2C read on an invalid address lead to the whole CDN_API_DPTX API enter a BUSY status. It is unknown how to recover from it.

Follow-up questions julienjayat‌ 

- What is the expected DPTX_I2C_Write_response format ? Should size field be int or uint16_t ?

      During the testing, the size return was 0xFFFF0004 and 0xFFFF00002 for write of 4 and 2 bytes. Linux uses 32-bit but the DPTX seems to use 16-bit.

- What is the expected response from CDN_API_DPTX_GetLastI2cStatus ? 

- How can we recover from a failed i2c read ? Most driver will try to read data during probe, this should not lock the whole displayport interface.

Thanks,

Stan

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julien_jayat
NXP Employee
NXP Employee

Hi Stan,

The size return was 0xFFFF0004 and 0xFFFF00002 for write of 4 and 2 bytes. Linux uses 32-bit but the DPTX seems to use 16-bit.

=> I also noticed that . Even if the API is declaring an int, it looks like only 16bits are actually used.

----

About, CDN_API_DPTX_GetLastI2cStatus, I confirm that it is always returning "0 - I2C_ACK", even when the Display Port is not connected to a screen.

-----

I haven't reproduced the unrecoverable issue, using your patches and the same command:

root@imx8qmmek:~# i2ctransfer -y imx_dp_aux w1@0x52 0x7 r1
[954.636144] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[954.642554] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[954.649072] [drm] dp_aux_transfer() msg->request 0x0 msg->size 0x0
Error: Sending messages failed: Remote I/O error
root@imx8qmmek:~# i2ctransfer -y imx_dp_aux r1@0x52
[961.837311] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[961.843721] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[961.850227] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
Error: Sending messages failed: Remote I/O error
root@imx8qmmek:~# i2ctransfer -y imx_dp_aux r1@0x50
[996.973140] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[996.979547] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[996.986148] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
0x00

I will report the issues to the firmware provider.

Best regards,

Julien,

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bblackson
Contributor I

Hello 

I've been trying to get the same function working on imx8mq-evk

(Linux imx8mqevk 4.19.35-ge4452f445) plus the patches to add AUX function

I see the following on boot

[ 0.962064] imx-dcss-crtc imx-dcss-crtc.0: DMA mask not set
[ 0.968106] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 0.974745] [drm] No driver support for vblank timestamp query.
[ 0.980808] imx-drm display-subsystem: bound imx-dcss-crtc.0 (ops dcss_crtc_ops)
[ 0.988352] i.mx8-hdp 32c00000.hdmi: Proof of update
[ 0.993332] i.mx8-hdp 32c00000.hdmi: IS dp, is edp 0 0
[ 0.998623] [drm] CDN_API_General_Test_Echo_Ext_blocking - APB(ret = 0 echo_resp = echo test)
[ 1.007163] [drm] CDN_API_General_getCurVersion - ver 26098 verlib 20691
[ 1.013930] [drm] Pixel clock frequency: 594000 KHz, character clock frequency: 594000, color depth is 8-bit.
[ 1.023860] [drm] Pixel clock frequency (594000 KHz) is supported in this color depth (8-bit). Settings found in row 27
[ 1.034659] [drm] VCO frequency is 5940000
[ 1.038769] [drm] VCO frequency (5940000 KHz) is supported. Settings found in row 14
[ 1.071010] [drm] CDN_API_General_Write_Register_blocking LANES_CONFIG ret = 0
[ 1.078262] [drm] Failed to get HDCP config - using HDCP 2.2 only
[ 1.084500] [drm] Failed to initialize HDCP
[ 1.089486] [drm] hdmi-audio-codec driver bound to HDMI
[ 1.094738] imx-drm display-subsystem: bound 32c00000.hdmi (ops imx_hdp_imx_ops)
[ 1.102201] [drm] Cannot find any crtc or sizes
[ 1.107041] [drm] Initialized imx-drm 1.0.0 20120507 for display-subsystem on minor 0

 

My issue is that when I try to run any i2c command (i2ctransfer -y imx_dp_aux w1@0x50 0x7 r1)

I see this 

Error: I2C bus name doesn't match any bus present!

It seems that the connection type passed to the driver is not DP/eDP  (I added some debug to this part of the driver code) so the DP AUX never gets initialized 

I have tried applying fsl-imx8mq-evk-dp.dtb / fsl-imx8mq-evk-edp.dtb (one or both in every combo)

but there's no change. 

I've used a HDMI->DP cable to my dell monitor (doesn't work) and this adapter (with recommended hardware mod) https://community.nxp.com/t5/i-MX-Processors/i-MX8-Display-Port-Interface/m-p/809824

Did you or @sbertrand  see this early on?

Should I be changing a higher level dts/dtsi too ? 

I'm new to this kernel/driver world so hopefully I'm missing something obvious. 

Thanks!

 

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sbertrand
Contributor III

Hi,

Your mention of the HDMI -> DP cable is a dead give away that you are missing important facts here.

I used a custom NXP imx8mq-evk with DisplayPort. Boards that have HDMI connectors are not suitable for DisplayPort.

Despite the hardware limitation, support for DisplayPort requires a change of firmware for the HDMI/DisplayPort IP bloc inside the iMX8. See the NXP documentation about the iMX8 boot image and the system setup performed by U-Boot.

Reach out to your NXP contact for support or documentation.

In any case :

i2cdetect -l
i2c-3 i2c 5a800000.i2c I2C adapter
i2c-6 i2c imx_dp_aux I2C adapter
i2c-4 i2c 58226000.i2c I2C adapter
i2c-2 i2c 57226000.i2c I2C adapter
i2c-5 i2c TC358767 AUX i2c adapter I2C adapter

 

1,568 Views
sbertrand
Contributor III
With careful review, I still have the same question : 
  • How to you get the following behavior  ? 
    root@imx8qmmek:~# i2ctransfer -y imx_dp_aux r1@0x52
    [961.837311] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
    [961.843721] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
    [961.850227] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
    Error: Sending messages failed: Remote I/O error

    This suggest that CDN_API_DPTX_GetLastI2cStatus reports an error for the read operation.

  • There seems to be a difference in behavior for the write. Are we using the same code ? same firmware ?
    NXP Test:
    root@imx8qmmek:~# i2ctransfer -y imx_dp_aux w1@0x52 0x7 r1
    [954.636144] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
    [954.642554] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
    [954.649072] [drm] dp_aux_transfer() msg->request 0x0 msg->size 0x0
    Error: Sending messages failed: Remote I/O error
    Benq Display :
    root@quicksilver:~# i2ctransfer -y imx_dp_aux w1@0x52 0x7 r1
    [  715.685649] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
    [  715.692166] [drm] dp_aux_transfer() msg->request 0x0 msg->size 0x0
    Error: Sending messages failed: Remote I/O error
    Custom Display :
    root@quicksilver:~# i2ctransfer -y imx_dp_aux w1@0x52 0x7 r1
    [  822.661576] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
    [  822.668037] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
    [  822.674607] [drm] dp_aux_transfer() msg->request 0x0 msg->size 0x0
    Error: Sending messages failed: Remote I/O error

    This suggest that CDN_API_DPTX_GetLastI2cStatus reports errors differently depending on the display.
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julien_jayat
NXP Employee
NXP Employee

Hi Stan,

Firmware: dptx_hdcp_1_0_61_rc2_imx8qm.bin

I tested with different screens and had different results (there is additional debug in my driver see the included patches (based on your implementation)):

#DQ980  (display port Analyser)
root@imx8qmmek:~# i2ctransfer -y imx_dp_aux w1@0x50 0x0 r8
[ 2020.162078] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[ 2020.168491] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2020.175780] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[ 2020.183970] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2020.190956] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[ 2020.197374] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2020.204257] [drm] 0x00000050:
[ 2020.207224] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x8
[ 2020.215199] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2020.222085] [drm] 0x00000050: 00 ff ff ff ff ff ff 00
[ 2020.227148] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
[ 2020.233554] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2020.240439] [drm] 0x00000050:
0x00 0xff 0xff 0xff 0xff 0xff 0xff 0x00
root@imx8qmmek:~#
root@imx8qmmek:~# i2ctransfer -y imx_dp_aux w1@0x52 0x0 r8
[ 2020.952821] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[ 2020.959233] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2020.966228] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[ 2020.972755] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 1
[ 2020.979754] [drm] dp_aux_transfer() msg->request 0x0 msg->size 0x0
[ 2020.986159] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
Error: Sending messages failed: Remote I/O error


#DELL 4K
root@imx8qmmek:~# i2ctransfer -y imx_dp_aux w1@0x50 0x0 r8
[ 2164.508878] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[ 2164.516097] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2164.523088] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[ 2164.529512] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2164.536488] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[ 2164.542890] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2164.549779] [drm] 0x00000050:
[ 2164.552757] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x8
[ 2164.559255] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2164.566189] [drm] 0x00000050: 00 ff ff ff ff ff ff 00
[ 2164.571328] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
[ 2164.577763] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2164.584668] [drm] 0x00000050:
0x00 0xff 0xff 0xff 0xff 0xff 0xff 0x00
root@imx8qmmek:~# i2ctransfer -y imx_dp_aux w1@0x52 0x0 r8
[ 2164.641777] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[ 2164.648536] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2164.655512] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[ 2164.663847] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2164.670841] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[ 2164.677580] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2164.684461] [drm] 0x00000052:
[ 2164.687429] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x8
[ 2164.694260] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2164.701144] [drm] 0x00000052: 00 00 00 00 00 00 00 00
[ 2164.706204] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
[ 2164.712938] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2164.719820] [drm] 0x00000052:
0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00

Phillips:
root@imx8qmmek:~# i2ctransfer -y imx_dp_aux w1@0x50 0x0 r8
[ 2361.648471] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[ 2361.655133] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2361.662120] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[ 2361.668781] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2361.675758] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[ 2361.682417] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2361.689301] [drm] 0x00000050:
[ 2361.692278] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x8
[ 2361.698932] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 1
[ 2361.705813] [drm] 0x00000050:
[ 2361.708786] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
[ 2361.715433] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0
[ 2361.722320] [drm] 0x00000050:
Error: Sending messages failed: Remote I/O error
root@imx8qmmek:~# i2ctransfer -y imx_dp_aux w1@0x52 0x0 r8
[ 2361.780689] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[ 2361.788300] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 1
[ 2361.795312] [drm] dp_aux_transfer() msg->request 0x0 msg->size 0x0
[ 2361.801988] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 1
Error: Sending messages failed: Remote I/O error

Included are the logs of the i2c-over-aux captured by the "Passive aux IN" input from the Display port analyzer.

It shows that when CDN_API_DPTX_GetLastI2cStatus_blocking returns  i2c_status=1 (NACK), there is actually a NACK occurring on the i2c-over-aux.

Julien

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sbertrand
Contributor III

Hi

Comparison between Native and Bridge I2C operation on the BENQ monitor.

Bridge

root@quicksilver:~#  i2ctransfer -y "TC358767 AUX i2c adapter" w1@0x50 0x7 r1  
[  126.100689] [drm] tc_aux_transfer() msg->request 0x4 msg->size 0x0
[  126.109849] [drm] Write I2C Status 0
[  126.114270] [drm] tc_aux_transfer() msg->request 0x4 msg->size 0x1
[  126.124083] [drm] Write I2C Status 0
[  126.128477] [drm] tc_aux_transfer() msg->request 0x5 msg->size 0x0
[  126.137645] [drm] Read I2C Status 0
[  126.141959] [drm] tc_aux_transfer() msg->request 0x5 msg->size 0x1
[  126.151117] [drm] Read I2C Status 0
[  126.156181] [drm] tc_aux_transfer() msg->request 0x1 msg->size 0x0
[  126.165797] [drm] Read I2C Status 0
0x00
root@quicksilver:~#  i2ctransfer -y "TC358767 AUX i2c adapter" r1@0x50      
[  140.547985] [drm] tc_aux_transfer() msg->request 0x5 msg->size 0x0
[  140.557183] [drm] Read I2C Status 0
[  140.561488] [drm] tc_aux_transfer() msg->request 0x5 msg->size 0x1
[  140.570630] [drm] Read I2C Status 0
[  140.575738] [drm] tc_aux_transfer() msg->request 0x1 msg->size 0x0
[  140.584892] [drm] Read I2C Status 0
0x09
root@quicksilver:~#  i2ctransfer -y "TC358767 AUX i2c adapter" w1@0x52 0x7 r1  
[  168.232598] [drm] tc_aux_transfer() msg->request 0x4 msg->size 0x0
[  168.241828] [drm] Write I2C Status 1
[  168.246222] [drm] tc_aux_transfer() msg->request 0x0 msg->size 0x0
[  168.255366] [drm] Write I2C Status 0
Error: Sending messages failed: Remote I/O error
root@quicksilver:~#  i2ctransfer -y "TC358767 AUX i2c adapter" r1@0x52
[  174.124053] [drm] tc_aux_transfer() msg->request 0x5 msg->size 0x0
[  174.133237] [drm] Read I2C Status 1
[  174.137543] [drm] tc_aux_transfer() msg->request 0x1 msg->size 0x0
[  174.146931] [drm] Read I2C Status 0
Error: Sending messages failed: Remote I/O error

Native

root@quicksilver:~#  i2ctransfer -y imx_dp_aux w1@0x50 0x7 r1
[   32.942263] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[   32.948789] [drm] Write CDN_API_DPTX_GetLastI2cStatus 0
[   32.954051] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[   32.960581] [drm] Write CDN_API_DPTX_GetLastI2cStatus 0
[   32.965853] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[   32.972293] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
[   32.977473] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[   32.984257] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
[   32.989404] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
[   32.995871] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
0x07
root@quicksilver:~# i2ctransfer -y imx_dp_aux r1@0x50
[   50.567033] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[   50.573476] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
[   50.578646] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[   50.585173] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
[   50.590395] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
[   50.596847] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
0xd1
root@quicksilver:~#  i2ctransfer -y imx_dp_aux w1@0x52 0x7 r1
[   55.230784] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[   55.237320] [drm] Write CDN_API_DPTX_GetLastI2cStatus 1
[   55.242591] [drm] dp_aux_transfer() msg->request 0x0 msg->size 0x0
[   55.249081] [drm] Write CDN_API_DPTX_GetLastI2cStatus 1
Error: Sending messages failed: Remote I/O error
root@quicksilver:~# i2ctransfer -y imx_dp_aux r1@0x52
[   65.710820] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[   65.717307] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
[   65.722498] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[   65.729245] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
[   65.734419] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
[   65.740921] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
0x00

The behavior is not the same. Furthermore the returned data is invalid / inconsistant.

root@quicksilver:~# hexdump -C /sys/class/drm/card0-DP-1/edid
00000000  00 ff ff ff ff ff ff 00  09 d1 1b 80 45 54 00 00  |............ET..|
00000010  13 1b 01 04 a5 35 1e 78  3a 0c d5 a9 55 4c a1 25  |.....5.x:...UL.%|
00000020  0d 50 54 a5 6b 80 d1 c0  b3 00 a9 c0 81 80 81 00  |.PT.k...........|
00000030  81 c0 01 01 01 01 56 5e  00 a0 a0 a0 29 50 30 20  |......V^....)P0 |
00000040  35 00 0f 28 21 00 00 1a  00 00 00 ff 00 43 35 48  |5..(!........C5H|
00000050  30 37 35 34 38 30 31 39  0a 20 00 00 00 fd 00 32  |07548019. .....2|
00000060  4c 1e 59 1b 04 11 00 f0  f8 38 f0 3c 00 00 00 fc  |L.Y......8.<....|
00000070  00 42 65 6e 51 20 4c 43  44 0a 20 20 20 20 01 98  |.BenQ LCD.    ..|
00000080  02 03 22 71 4f 90 1f 05  14 04 13 03 12 02 11 01  |.."qO...........|
00000090  07 16 15 06 23 09 17 07  83 01 00 00 65 6e 0c 00  |....#.......en..|
000000a0  10 00 8c 0a d0 8a 20 e0  2d 10 10 3e 96 00 0f 28  |...... .-..>...(|
000000b0  21 00 00 18 01 1d 00 72  51 d0 1e 20 6e 28 55 00  |!......rQ.. n(U.|
000000c0  0f 28 21 00 00 1e 01 1d  00 bc 52 d0 1e 20 b8 28  |.(!.......R.. .(|
000000d0  55 40 0f 28 21 00 00 1e  8c 0a d0 90 20 40 31 20  |U@.(!....... @1 |
000000e0  0c 40 55 00 0f 28 21 00  00 18 00 00 00 00 00 00  |.@U..(!.........|
000000f0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 6e  |...............n|

Read 7th byte : 7 is returned instead of the data.

root@quicksilver:~# i2ctransfer -y imx_dp_aux w1@0x50 0x7 r5
[  996.774755] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[  996.781290] [drm] Write CDN_API_DPTX_GetLastI2cStatus 0
[  996.786565] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[  996.793086] [drm] Write CDN_API_DPTX_GetLastI2cStatus 0
[  996.798347] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[  996.804847] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
[  996.810018] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x5
[  996.819025] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
[  996.824175] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
[  996.831077] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
0x07 0x07 0x07 0x07 0x07

Read 8th byte : 8 is returned instead of the data

root@quicksilver:~# i2ctransfer -y imx_dp_aux w1@0x50 0x8 r5
[  992.966794] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[  992.973310] [drm] Write CDN_API_DPTX_GetLastI2cStatus 0
[  992.978572] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[  992.985101] [drm] Write CDN_API_DPTX_GetLastI2cStatus 0
[  992.990366] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[  992.996876] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
[  993.002049] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x5
[  993.011056] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
[  993.016209] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
[  993.023122] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
0x08 0x08 0x08 0x08 0x08

Read 6th byte : Ok

root@quicksilver:~# i2ctransfer -y imx_dp_aux w1@0x50 0x6 r5
[ 1036.226694] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[ 1036.233264] [drm] Write CDN_API_DPTX_GetLastI2cStatus 0
[ 1036.238524] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[ 1036.245042] [drm] Write CDN_API_DPTX_GetLastI2cStatus 0
[ 1036.250297] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[ 1036.256790] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
[ 1036.261968] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x5
[ 1036.269170] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
[ 1036.274330] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
[ 1036.281232] [drm] Read CDN_API_DPTX_GetLastI2cStatus 0
0xff 0x00 0x09 0xd1 0x1b

But also fails

root@quicksilver:~# i2ctransfer -y imx_dp_aux w1@0x50 0x6 r5
[ 1034.587042] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[ 1034.593542] [drm] Write CDN_API_DPTX_GetLastI2cStatus 1
[ 1034.598804] [drm] dp_aux_transfer() msg->request 0x0 msg->size 0x0
[ 1034.605316] [drm] Write CDN_API_DPTX_GetLastI2cStatus 0
Error: Sending messages failed: Remote I/O error

Does the read operation correctly supports MOT flag ?
The displayport bridge TC358767 has a correct behavior that the IMX HDP should match since the same screen is used.
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julien_jayat
NXP Employee
NXP Employee

Hi Stan,

When using imx8QM to read the first byte of the Phillips Brillance 240B screen using i2c_over-aux:

 

i2ctransfer -y 9  w1@0x50 0x0 r0

[  188.970564] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0

[  188.976809] [drm]  msg->request = DP_AUX_I2C_WRITE,  msg->size = 0, msg->buffer = 0 , MOT= 1

[  188.985728] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0

[  188.992724] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1

[  188.998921] [drm]  msg->request = DP_AUX_I2C_WRITE,  msg->size = 1, msg->buffer = F3751A00 , MOT= 1

[  189.008446] [drm] Write CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0

[  189.015414] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0

[  189.021671] [drm]  msg->request = DP_AUX_I2C_READ,  msg->size = 0, msg->buffer = 0 , MOT= 1

[  189.030666] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 0

[  189.037584] dp_aux_transfer()

[  189.040558] [drm] 0x00000050:

[  189.043552] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0

[  189.049758] [drm]  msg->request = DP_AUX_I2C_READ,  msg->size = 0, msg->buffer = 0 , MOT= 0

[  189.058580] [drm] Read CDN_API_DPTX_GetLastI2cStatus_blocking i2c_status 1

[  189.065472] dp_aux_transfer()

[  189.068440] [drm] 0x00000050:

With a laptop with native display port and running Ubuntu.

=> the same i2c command is successful.

I logged both i2c-over-aux using the passive Auxiliary Channel Analyzer.

Attached are both logs, and an html presenting the side by side comparison.

    • It looks like CDN_API_DPTX_I2C_Write is not using the “mot” when “numOfBytes” is 0.

Issue have been reported to firmware provider.

Julien,

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julien_jayat
NXP Employee
NXP Employee

Hi Peter,

here is the firmware for working on 1 lane on display port.

Julien,

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peter_pinewski
NXP Employee
NXP Employee

Thx Julien.

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sbertrand
Contributor III

Hi,

I am using kernel 4.14.98 for my testing.

Can you provide the kernel version used and the hdp firmware version used for your testing ?

I haven't reproduced the unrecoverable issue, using your patches and the same command:

You testing seems to show that CDN_API_DPTX_GetLastI2cStatus correctly returns when performing a read. Which does not on my side.

Thanks,

Stan

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sbertrand
Contributor III

Hi,

While looking to solve our link training issue. We are testing accessing the I2C bus via the Aux channel on the DisplayPort Link.

The IMX HDP driver does not seems to support I2C access.

root@quicksilver:~# i2cget -y -a imx_dp_aux 0x50             

[  315.523510] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[  315.529758] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[  315.535998] dp_aux_transfer: only native messages supported
[  315.541610] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
Error: Read failed

How can we get I2C bus access via the Aux Channel ?

Are the CDN_API_DPTX_I2C_Read and CDN_API_DPTX_I2C_Write API functional ?

Regards,
Stan

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sbertrand
Contributor III
I tried using the CDN_API_DPTX_I2C_Read and CDN_API_DPTX_I2C_Write API on the iMX8MQ EVK.
The first implementation had issue in reporting data.
root@imx8mqevk:~# i2cget -y imx_dp_aux 0x50
[  297.683583] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[  297.689952] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[  297.697107] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
0x6e
root@imx8mqevk:~# i2cget -y imx_dp_aux 0x50
[  317.555734] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[  317.562023] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[  317.569181] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
0x00
root@imx8mqevk:~# hexdump -C /sys/class/drm/card0-DP-1/edid
00000000  00 ff ff ff ff ff ff 00  09 d1 1b 80 45 54 00 00  |............ET..|
00000010  13 1b 01 04 a5 35 1e 78  3a 0c d5 a9 55 4c a1 25  |.....5.x:...UL.%|
00000020  0d 50 54 a5 6b 80 d1 c0  b3 00 a9 c0 81 80 81 00  |.PT.k...........|
00000030  81 c0 01 01 01 01 56 5e  00 a0 a0 a0 29 50 30 20  |......V^....)P0 |
00000040  35 00 0f 28 21 00 00 1a  00 00 00 ff 00 43 35 48  |5..(!........C5H|
00000050  30 37 35 34 38 30 31 39  0a 20 00 00 00 fd 00 32  |07548019. .....2|
00000060  4c 1e 59 1b 04 11 00 f0  f8 38 f0 3c 00 00 00 fc  |L.Y......8.<....|
00000070  00 42 65 6e 51 20 4c 43  44 0a 20 20 20 20 01 98  |.BenQ LCD.    ..|
00000080  02 03 22 71 4f 90 1f 05  14 04 13 03 12 02 11 01  |.."qO...........|
00000090  07 16 15 06 23 09 17 07  83 01 00 00 65 6e 0c 00  |....#.......en..|
000000a0  10 00 8c 0a d0 8a 20 e0  2d 10 10 3e 96 00 0f 28  |...... .-..>...(|
000000b0  21 00 00 18 01 1d 00 72  51 d0 1e 20 6e 28 55 00  |!......rQ.. n(U.|
000000c0  0f 28 21 00 00 1e 01 1d  00 bc 52 d0 1e 20 b8 28  |.(!.......R.. .(|
000000d0  55 40 0f 28 21 00 00 1e  8c 0a d0 90 20 40 31 20  |U@.(!....... @1 |
000000e0  0c 40 55 00 0f 28 21 00  00 18 00 00 00 00 00 00  |.@U..(!.........|
000000f0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 6e  |...............n|
root@imx8mqevk:~# i2cget -y imx_dp_aux 0x50 0
[   28.073775] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[   28.080288] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[   28.086891] [drm] dp_aux_transfer() msg->request 0x0 msg->size 0x0
Error: Read failed
root@imx8mqevk:~# i2cget -y imx_dp_aux 0x50
[   30.982125] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[   30.988583] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[   30.995156] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
0x01
root@imx8mqevk:~# i2cget -y imx_dp_aux 0x50
[   32.526129] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[   32.532776] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[   32.539351] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
0xff
I made some changes. It would seems that the MOT (midde of transaction) has an importance and requests with size 0 should be processed.
root@imx8mqevk:~#
root@imx8mqevk:~# i2cget -y imx_dp_aux 0x50 0
[  366.399798] [drm] dp_aux_transfer() r.resp 80 0
[  381.038852] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[  381.050299] [drm] dp_aux_transfer() w.resp 80 0
[  381.050304] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[  381.061604] [drm] dp_aux_transfer() w.resp 80 1
[  381.061609] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[  381.072757] [drm] dp_aux_transfer() r.resp 80 0
[  381.072761] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[  381.083942] [drm] dp_aux_transfer() r.resp 80 1
[  381.083946] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
0x01
root@imx8mqevk:~# i2cget -y imx_dp_aux 0x50 0
[  381.095223] [drm] dp_aux_transfer() r.resp 80 0m
[  382.487058] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[  382.498498] [drm] dp_aux_transfer() w.resp 80 0m
[  382.498503] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[  382.509901] [drm] dp_aux_transfer() w.resp 80 1m
[  382.509905] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[  382.521176] [drm] dp_aux_transfer() r.resp 80 0m
[  382.521179] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[  382.532416] [drm] dp_aux_transfer() r.resp 80 1m
[  382.532419] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
0x01
root@imx8mqevk:~# i2cget -y imx_dp_aux 0x50 7
[  382.543666] [drm] dp_aux_transfer() r.resp 80 0m
[  385.649929] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[  385.661136] [drm] dp_aux_transfer() w.resp 80 0m
[  385.661141] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[  385.672369] [drm] dp_aux_transfer() w.resp 80 1m
[  385.672372] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[  385.683601] [drm] dp_aux_transfer() r.resp 80 0m
[  385.683605] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[  385.694798] [drm] dp_aux_transfer() r.resp 80 1m
[  385.694802] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
0x01
root@imx8mqevk:~# i2cget -y imx_dp_aux 0x50 8
[  385.706000] [drm] dp_aux_transfer() r.resp 80 0m
[  387.761930] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[  387.773195] [drm] dp_aux_transfer() w.resp 80 0m
[  387.773199] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[  387.784482] [drm] dp_aux_transfer() w.resp 80 1m
[  387.784486] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[  387.795696] [drm] dp_aux_transfer() r.resp 80 0m
[  387.795699] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x1
[  387.806997] [drm] dp_aux_transfer() r.resp 80 1m
[  387.807001] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
0x13
The data is not exactly as expected.
 
Now testing the same code on the iMX8QM lead to a busy system with does not provide data.
This also breaks native aux transfer.
 
root@quicksilver:~#
root@quicksilver:~# i2cget -y imx_dp_aux 0x50 0
[   60.808203] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[   62.311442] [drm] dp_aux_transfer() msg->request 0x0 msg->size 0x0
Error: Read failed
root@quicksilver:~# i2cget -y imx_dp_aux 0x50  
[   65.223561] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[   66.727439] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
Error: Read failed
                                                                                                                                
root@quicksilver:~# dd if=/dev/drm_dp_aux1 bs=1 skip=$((0x202)) count=1 status=none | od -An -d
[   91.148286] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[   92.652054] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[   94.156050] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[   95.660051] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  103.180050] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  104.684051] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  106.188050] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  107.692049] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  109.196049] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  110.700051] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  112.204051] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  113.708049] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  115.212050] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  116.716051] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  118.220049] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  119.724050] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  121.228051] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  122.732051] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  124.236050] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  125.740050] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  127.244050] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  128.748049] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  130.252049] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  131.756051] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  133.260052] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  134.764050] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  136.268050] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[  137.772050] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
dd: error reading '/dev/drm_dp_aux1': Input/output error
What should be the different firmware version for the HDMI/DP block ?
What is the status of DisplayPort on the IMX8QM ?
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sbertrand
Contributor III
I have tested the I2C over aux on the kernel 4.19.35 on iMX8MQ EVK.
The behavior seems similar. I get write failure : 
root@imx8mqevk:~# i2cset -y 3 0x50 0028@0x50
[  174.643655] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x0
[  174.649925] [drm] dp_aux_transfer() msg->request 0x4 msg->size 0x1
[  174.656541] [drm] dp_aux_transfer() msg->request 0x0 msg->size 0x0
Error: Write failed
I can't get the data :
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef 00: XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX    XXXXXXXXXXXXXXXX 10: XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX    XXXXXXXXXXXXXXXX 20: XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX    XXXXXXXXXXXXXXXX
The transfers does return data :
root@imx8mqevk:~# i2ctransfer -y 3 r128@0x50
[  176.315934] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x0
[  176.322338] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x10
[  176.331271] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x10
[  176.340175] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x10
[  176.349093] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x10
[  176.358017] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x10
[  176.366934] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x10
[  176.375846] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x10
[  176.384758] [drm] dp_aux_transfer() msg->request 0x5 msg->size 0x10
[  176.393675] [drm] dp_aux_transfer() msg->request 0x1 msg->size 0x0
0x00 0xff 0xff 0xff 0xff 0xff 0xff 0x00 0x09 0xd1 0x1b 0x80 0x45 0x54 0x00 0x00 0x13 0x1b 0x01 0x04 0xa5 0x35 0x1e 0x78 0x3a 0x0c 0xd5 0xa9 0x55 0x4c 0xa1 0x25 0x0d 0x50 0x54 0xa5 0x6b 0x80 0xd1 0xc0 0xb3 0x00 0xa9 0xc0 0x81 0x80 0x81 0x00 0x81 0xc0 0x01 0x01 0x01 0x01 0x56 0x5e 0x00 0xa0 0xa0 0xa0 0x29 0x50 0x30 0x20 0x35 0x00 0x0f 0x28 0x21 0x00 0x00 0x1a 0x00 0x00 0x00 0xff 0x00 0x43 0x35 0x48 0x30 0x37 0x35 0x34 0x38 0x30 0x31 0x39 0x0a 0x20 0x00 0x00 0x00 0xfd 0x00 0x32 0x4c 0x1e 0x59 0x1b 0x04 0x11 0x00 0xf0 0xf8 0x38 0xf0 0x3c 0x00 0x00 0x00 0xfc 0x00 0x42 0x65 0x6e 0x51 0x20 0x4c 0x43 0x44 0x0a 0x20 0x20 0x20 0x20 0x01 0x98
I am using the release rel_imx_4.19.35_1.1.0.
Something more seems needed for the write to succeed.

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joanxie
NXP TechSupport
NXP TechSupport

for imx8qm, I don't know how you change the source code and what display you use, if you  just want to change the lane, maybe you can try the dts file, for imx8M, maybe you can try to use“ i2cset -f -y 2 0x0b 0x44 0x02 0x00 sp”

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sbertrand
Contributor III

Hi,

Our goal is to use the iMX8 DisplayPort but using only a single lane.

We have performed initial testing on the iMX8MQ EVK board.

Connection to a display was successful using all 4 lanes. When using a single lane ( adapter were used to only have AUX and 1 link lane ), the link training failed.

The driver was patch as to support using only a limited number of lanes ( the number of lanes was reduces and the display mode were filtered to only those supported by the number of lanes selected ).

On the iMX8MQ EVK, the above was functional. The 2K display was only using 1280x800 resolution and audio was playing.

On the iMX8QM, using the same modification to the driver, the system fails to establish link training.

[ 7.082689] [drm] CDN_API_General_Write_* ... setting LANES_CONFIG C6
[ 7.091756] [drm] AFE_init
[ 7.094489] [drm] deasserted reset
[ 7.098168] PHY_PMA_CMN_CTRL2 = 1
[ 7.101551] PHY_PMA_CMN_CTRL1 = 3b
[ 7.137349] TX_ANA_CTRL_REG_1 ffff)
[ 7.140901] TX_ANA_CTRL_REG_2 30f)
[ 7.144369] TX_ANA_CTRL_REG_3 0)
[ 7.147661] TX_ANA_CTRL_REG_4 1001)
[ 7.151216] TX_ANA_CTRL_REG_5 0)
[ 7.154452] [drm] AFE_power exit
[ 7.157694] [drm] CDN_API_DPTX_SetVideo_blocking (ret = 0)
[ 7.163451] i2c i2c-6: of_i2c: modalias failure on /hdmi@56268000/port@0
[ 7.170162] i2c i2c-6: Failed to create I2C device for /hdmi@56268000/port@0
[ 7.177231] [drm] Failed to get HDCP config - using HDCP 2.2 only
[ 7.183346] [drm] Failed to initialize HDCP
[ 7.187906] [drm] hdmi-audio-codec driver bound to HDMI
[ 7.193147] imx-drm display-subsystem: bound 56268000.hdmi (ops imx_hdp_imx_ops)
[ 7.200818] nwl-mipi-dsi 57228000.mipi_dsi_bridge: [drm:nwl_dsi_host_attach] lanes=4, format=0x0 flags=0x801
[ 7.210673] imx-drm display-subsystem: bound mipi_dsi@57228000 (ops imx_nwl_dsi_component_ops)
[ 7.219395] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 7.227250] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x3
[ 7.233681] [drm] DP link revision: 0x12
[ 7.237607] [drm] DP link rate: 2700 Mbps
[ 7.241626] [drm] DP link number of lanes: 4
[ 7.245901] [drm] DP link capabilities: 0x1
[ 7.250095] [drm] DP link lanes limited to 1
[ 7.278948] [drm] dp_get_edid_block (ret = 0) block 0
[ 7.308571] [drm] dp_get_edid_block (ret = 0) block 1
[ 7.313636] i.mx8-hdp 56268000.hdmi: 0,ff,ff,ff,ff,ff,ff,0
[ 7.327250] [drm] AFE_init
[ 7.327269] [drm] deasserted reset
[ 7.327663] PHY_PMA_CMN_CTRL2 = 1
[ 7.327727] PHY_PMA_CMN_CTRL1 = 3b
[ 7.349830] TX_ANA_CTRL_REG_1 ffff)
[ 7.349892] TX_ANA_CTRL_REG_2 30f)
[ 7.349954] TX_ANA_CTRL_REG_3 0)
[ 7.350018] TX_ANA_CTRL_REG_4 1001)
[ 7.350080] TX_ANA_CTRL_REG_5 0)
[ 7.350082] [drm] AFE_power exit
[ 7.350098] [drm] CDN_API_DPTX_SetVideo_blocking (ret = 0)
[ 7.350099] [drm] dp_mode_set()
[ 7.350104] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 7.350319] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x6
[ 7.350587] [drm] DP link id: , 0x0 0x0 0x0 0x0 0x0 0x0
[ 7.350589] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x1
[ 7.350802] [drm] dp_aux_transfer() msg->request 0x9 msg->size 0x3
[ 7.351039] [drm] DP revision: 0x12
[ 7.351042] [drm] DP rate: 2700 Mbps
[ 7.351043] [drm] DP number of lanes: 4
[ 7.351045] [drm] DP capabilities: 0x1
[ 7.351046] [drm] DP actual number of lanes: 1
[ 7.351049] [drm] DP actual link rate: 0xa
[ 7.353646] [drm] AFE_init
[ 7.353668] [drm] deasserted reset
[ 7.354176] PHY_PMA_CMN_CTRL2 = 1
[ 7.354239] PHY_PMA_CMN_CTRL1 = 3b
[ 7.376328] TX_ANA_CTRL_REG_1 ffff)
[ 7.376391] TX_ANA_CTRL_REG_2 30f)
[ 7.376455] TX_ANA_CTRL_REG_3 0)
[ 7.376518] TX_ANA_CTRL_REG_4 1001)
[ 7.376581] TX_ANA_CTRL_REG_5 0)
[ 7.376583] [drm] AFE_power exit
[ 7.376596] [drm] CDN_API_DPTX_SetVideo_blocking (ret = 0)
[ 7.376629] [drm] CDN_API_DPTX_SetHostCap_blocking (ret = 0)
[ 7.377834] [drm] CDN_API_DPTX_Set_VIC_blocking (ret = 0)
[ 7.377851] [drm] CDN_API_DPTX_TrainingControl_* (ret = 0) start
[ 7.379642] [drm] INFO: Full link training started
[ 7.383713] [drm] INFO: Full link training started
[ 7.385396] [drm] ERROR: Clock recovery phase failed
[ 7.385411] [drm] CDN_API_DPTX_TrainingControl_* (ret = 0) stop
[ 7.395425] [drm] CDN_API_DPTX_TrainingControl_* (ret = 0) start
[ 7.397212] [drm] INFO: Full link training started
[ 7.401370] [drm] INFO: Full link training started
[ 7.403049] [drm] ERROR: Clock recovery phase failed
[ 7.403064] [drm] CDN_API_DPTX_TrainingControl_* (ret = 0) stop
[ 7.413078] [drm] CDN_API_DPTX_TrainingControl_* (ret = 0) start
[ 7.414951] [drm] INFO: Full link training started
[ 7.418945] [drm] INFO: Full link training started
[ 7.420628] [drm] ERROR: Clock recovery phase failed
[ 7.420642] [drm] CDN_API_DPTX_TrainingControl_* (ret = 0) stop
[ 7.429177] [drm] HDMI/DP Cable Plug In
[ 7.430658] [drm] CDN_API_DPTX_TrainingControl_* (ret = 0) start
[ 7.432445] [drm] INFO: Full link training started
[ 7.436437] [drm] INFO: Full link training started
[ 7.438117] [drm] ERROR: Clock recovery phase failed
[ 7.438132] [drm] CDN_API_DPTX_TrainingControl_* (ret = 0) stop
[ 7.448146] [drm] CDN_API_DPTX_TrainingControl_* (ret = 0) start
[ 7.449927] [drm] INFO: Full link training started
[ 7.454002] [drm] INFO: Full link training started
[ 7.455686] [drm] ERROR: Clock recovery phase failed
[ 7.455701] [drm] CDN_API_DPTX_TrainingControl_* (ret = 0) stop
[ 7.466968] [drm] link status 0x00 0x00 0x00 0x00 0x03 0x00
[ 7.466972] [drm] Link is bad - need to restart training

What should be the lanes mapping configuration for the iMX8QM ? Where is the lanes mapping configuration documented ?

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joanxie
NXP TechSupport
NXP TechSupport

the display port difference between imx8qm and imx8mq is:

i.MX 8QuadMax supports HDMI audio and on-chip HDMI hardware through MIPI pins.
i.MX 8M Quad supports HDMI through DCSS

the imx8qm is under preproduction,for the limited information, refer to the release note, if you need to test display port, you should set "hdp_file=dpfw.bin" and use Image-fsl-imx8mq-evk-epd.dtb: Display Port support

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gsa
Contributor I

Hello Joan,

We are currently trying to implement Display Port on the HDMI_TX/Display Port controller on the i.MX8QM.

1) Where can I find the device tree source of Image-fsl-imx8mq-evk-epd.dtb?

2) We succeed to establish a Display Port link with the screen but the screen does not receive an input signal. We suspect the lane mapping is not correct. We use only one lane on HDMI_TX0_DATA2_EDP0_P/N. What should be the dp-lane-mapping in the device tree?

Thanks a lot,

Georges

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