iMX7 rise/fall time with 3.3V operation

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iMX7 rise/fall time with 3.3V operation

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Contributor I

Dear Team,

Our plateform is iMX7 with etherent application.

The ethernet Interface is RGMII which operation with 3.3V.

We find a case that tell the RGMII rise/fall time spec. should change to 1ns when 3.3V operation.

https://community.nxp.com/t5/T-Series/T1040-rise-and-fall-times-for-3-3V/m-p/601192

Does iMX7 can follow the 1ns rise/fall time spec. when RGMII powered at 3.3V?

 

Please advise,

Tks,

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NXP TechSupport
NXP TechSupport

Hi justin_hsieh

 

>Does iMX7 can follow the 1ns rise/fall time spec. when RGMII powered at 3.3V?

 

yes, as described in sect.4.10.3.3 Signal switching specifications 

i.MX 7Dual Family of Applications Processors Datasheet 

 

Best regards
igor

 

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Contributor I

Hi Igor,

Sorry, We can't find the rise/fall time for 3.3 operation in sect.4.10.3.3.

Follow the case https://community.nxp.com/t5/T-Series/T1040-rise-and-fall-times-for-3-3V/m-p/601192

There is a formula for max rise/fall time calculate with different voltage operation.

The max rise/fall time t = LVDD[V]*(0.8-0.2)/2[V/ns].

For LVDD=3.3V this expression gives 0.99 ns.

So, the iMX7's rise/fall time spec. will be 0.99ns for 3.3V bank voltage.

 

Please advise,

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NXP TechSupport
NXP TechSupport

 

 

1.jpg

 

Best regards
igor

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Contributor I

Hi Igor,

We had mesure the RGMII_TXC (pin ENET1_TXC)  rise/fall time at CPU side.

The results is  can't meet the 0.75ns when RGMII powered at 3.3V.

Please help dobule confirm the rise/fail spec. 0.75ns is suitable for 3.3V operation.

TX_CLK.jpg

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NXP TechSupport
NXP TechSupport

Hi justin_hsieh


>Please help dobule confirm the rise/fail spec. 0.75ns is suitable for 3.3V operation.


yes, datasheet valid for 3.3V operation too. Your issues may be related to board

layout, one can recheck it using sect.3.6.5. Impedance signal recommendations

Hardware Development Guide for i.MX7Dual and 7Solo Applications Processors

https://www.nxp.com/webapp/Download?colCode=IMX7DSHDG

also one can adjust drive strength DSE field in register IOMUXC_SW_PAD_CTL_PAD_ENET1_TX_CLK


Best regards
igor

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