The iMX6ULL DDR3 script aid doesn't allow to specify CL/CWL and this results in violations of these settings when down-binning a DDR3-1866 to DDR3-1600.
In my case, I have a single MT41K256M16TW-107P mounted on an iMX6ULL board:
This is a 1866 MT/s DDR3 module that can be down-binned to be backwards compatible with a 1600 MT/s DDR3 (the highest supported in the iMX6ULL DDR script aid excel sheet). To do this, you need to set CL to 11, and CWL to 8 (every other combination is reserved and should not be set):
But, filling in the iMX6ULL DDR3 script results in invalid CL and CWL combinations:
setmem /32 0x021b000c = 0x676B52F3 // MMDC0_MDCFG0 setmem /32 0x021b0010 = 0xB66D0B63 // MMDC0_MDCFG1
The script sets register value CL to 0x3, meaning a CL of 6 cycles, and tCWL set to 0x3, meaning a tCWL of 5 cycles.
Even though this is a valid combination resulting in a tCK of 2.5 ns, this is not correct when down-binning to DDR3-1600.
The iMX6DQSDL DDR3 script aid allows setting and calculating all other values as per datasheet.
Hi @Yuri, please can you the tool to configure more parameters because I have the same problem (my system is composed by iMX6ULL and DDR3L1866). I found this "MX6SX_MMDC_DDR3_register_programming_aid_v0", it could be right?
Thank you in advance
The tool "MX6SX_MMDC_DDR3_register_programming_aid_v0" is for i.MX 6SoloX.
Please create separate Community thread or request to get i.Mx 6ULL tool.
ok @Yuri, could you please send me the tool where is possible to se more parameters? The same that you send to Michael. I have already use the I.MX6ULL_DDR3_Script_Aid_V0.01 but I can not set up some parameters.
Why is the extended DDR script aid Excel sheet not intended for the public community?
The current UL/ULL DDR script aid Excel sheet is causing violations in DDR params, especially when downbinning is required. This is causing a lot of devices out there to have bad DDR scripts.
The D/Q DDR script aid Excel sheet currently publicly downloadable from your site DOES allow ALL parameters to be set correctly. The MMDC controllers in the UL/ULL are all the same in all iMX6 series processors, so there is really no reason you couldn't publicly publish the extended DDR script aid you sent me for public download.
You are currently stifling proper development by supplying a tool that generates bad output.