iMX6ULEVK - DDR Stress Test Tool with JTAG

[nickbedbury]

I'd like to run the DDR Stress Test Tool on the iMX6ULEVK via JTAG using Segger JLink Plus.  

I followed the instructions in other posts and modified the EVK hardware (removed R1407, R1431 to R1434 and added R1912 and R1914 to R1916).  

I can initialize a connection with JLink.exe and the commands:

   device mcimx6g2

   connect

Selecting defaults, it then prints:

JTAG chain detection found 3 devices:
#0 Id: 0x5BA00477, IRLen: 04, CoreSight JTAG-DP
#1 Id: 0x00000001, IRLen: 05, Unknown device
#2 Id: 0x1891D01D, IRLen: 04, JTAG-DP
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[1]: APB-AP (IDR: Not set)
Using preconfigured AP[1] as APB-AP
AP[1]: APB-AP found
ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID:04-001BB961 TMC
ROMTbl[0][1]: CompAddr: 80002000 CID: B105900D, PID:04-004BB906 CTI
ROMTbl[0][2]: CompAddr: 80003000 CID: B105900D, PID:04-004BB912 TPIU
ROMTbl[0][3]: CompAddr: 80004000 CID: B105F00D, PID:04-001BB101 TSG
ROMTbl[0][4]: CompAddr: 80020000 CID: B105100D, PID:04-000BB4A7 ROM Table
ROMTbl[1][0]: CompAddr: 80030000 CID: B105900D, PID:04-005BBC07 Cortex-A7
Found Cortex-A7 r0p5
6 code breakpoints, 4 data breakpoints
Debug architecture ARMv7.1
Data endian: little
Main ID register: 0x410FC075
I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 32 KB, 128 Sets, 64 Bytes/Line, 4-Way
Unified-Cache L2: 128 KB, 256 Sets, 64 Bytes/Line, 8-Way
System control register:
Instruction endian: little
Level-1 instruction cache enabled
Level-1 data cache enabled
MMU enabled
Branch prediction enabled
Cortex-A7 identified.
J-Link>

I can then set memory per the MX6UL_MMDC_DDR3_register_programming_aid.inc script with calls like:

w4 0x020C4068, 0xFFFFFFFF

For the final step, I need to load the binary and run it.  However, the command "loadbin ddr-test-uboot-jtag-mx6ul.elf 907000" prints "File is of unknown / supported format."   I tried converting ELF to .bin using arm-linux-gnueabihf-objcopy but I don't think it worked properly, or maybe that's not necessary.  I'm also not sure if x907000 is the correct address.

Does anyone know how to load and run the stress test binary properly using Segger JLink? 

[Yuri · Accepted solution]

Hello,

  Basically the .elf is executable file, that contains all information where

be loaded and run. It does not require load address, but special (elf supporting)

loader should be used. In Your case, looks like, just a binary file, as memory

image should be applied. Use so called U-boot versions of memory test firmware.

https://community.nxp.com/servlet/JiveServlet/download/105652-38-421645/ddr_stress_tester_uboot_v2.8... 

https://community.nxp.com/docs/DOC-105652 

Have a great day,
Yuri

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[nickbedbury]

Hi Yuri,

I assume the binary files provided with the U-boot version are just the JTAG ELF converted to binary, using "objcopy -O binary <.elf> <.bin>".  I was able to load ddr-test-uboot-jtag-mx6ul.bin to address 0x907000 and run it.

Thanks,

-Nick