iMX6UL define sai1 as master

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iMX6UL define sai1 as master

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Contributor III

Hi all!

I'm trying to use iMX6UL's SAI1 as master in order to connect it to an ADC. This device can be used just as slave and needs a MCLK signal to be enabled. I've tried to enabled this signal in my dtsi (MX6UL_PAD_CSI_DATA01__SAI1_MCLK) but is not posible to display the signal in the osciloscope. I've printed out princtrl-map and this signal is defined as part of SAI1.

I don't really know what I'm missing... This is my configuration:

imx6ul.dtsi:

                sai1: sai@02028000 {
                    compatible = "fsl,imx6ul-sai",
                             "fsl,imx6sx-sai";
                    reg = <0x02028000 0x4000>;
                    interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
                    clocks = <&clks IMX6UL_CLK_SAI1_IPG>,
                         <&clks IMX6UL_CLK_DUMMY>,
                         <&clks IMX6UL_CLK_SAI1>,
                         <&clks 0>, <&clks 0>;
                    clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
                    dma-names = "rx", "tx";
                    dmas = <&sdma 35 24 0>, <&sdma 36 24 0>;
                    status = "disabled";
                };

my_board.dtsi:

                  &sai1 {
                       pinctrl-names = "default";
                      pinctrl-0 = <&pinctrl_sai1>;
                      assigned-clocks = <&clks IMX6UL_CLK_SAI1_SEL>,<&clks IMX6UL_CLK_SAI1>;
                      assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
                      assigned-clock-rates = <0>, <11289600>;
                     fsl,sai-mclk-direction-output;
                     status = "okay";
               };

        pinctrl_sai1: sai1grp {
            fsl,pins = <
                MX6UL_PAD_CSI_DATA05__SAI1_TX_BCLK    0x11088
                MX6UL_PAD_CSI_DATA04__SAI1_TX_SYNC    0x17088
                MX6UL_PAD_CSI_DATA06__SAI1_RX_DATA    0x11088
                MX6UL_PAD_CSI_DATA07__SAI1_TX_DATA    0x11088
                MX6UL_PAD_CSI_DATA01__SAI1_MCLK        0x17088      
            >;
        };

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Contributor III

Hi all,

Finally, I've the SAI1_MCLK working as I expected! For some reason, The PLLs were powerdown and not enabled. and Also CG14 bits of register CCM_CCGR5 were in low state.

Thanks you all for the support!

Best Regards!

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Contributor III

Hi stefano,

Great that its working for you and you are able to see the waveform in oscilloscope. i am also trying to configure sai1 to interface it with one microphone SPH0645LM4H. in device i am not able to get the meaning of assigned clocks and clock rates. as there are 4 clocks which should be given to sai block (bus, mclk1, mclk2, mclk3). how can we configure these in device tree and how to enable our processor as master mode. it will be really helpful if you can share some inputs.

Thanks,

Hitesh

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Contributor III

Hi all,

Finally, I've the SAI1_MCLK working as I expected! For some reason, The PLLs were powerdown and not enabled. and Also CG14 bits of register CCM_CCGR5 were in low state.

Thanks you all for the support!

Best Regards!

View solution in original post

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Contributor V

Hi Stefano, I'm experiencing exactly the same issue with recent Release kernel (imx_4.14.98_2.0.0_ga). I can enable the clock from userspace using memtool exactly as you suggested:

./memtool -32 0x020c407c=0x303f003f # Set CG14 bits in CCM_CCGR5
./memtool -32 0x020c8078=0x00001000 # Reset POWERDOWN bit in CCM_ANALOG_PLL_AUDIO
./memtool -32 0x020c8074=0x00002000 # Set ENABLE bit in CCM_ANALOG_PLL_AUDIO

But I cannot find out how to do this job in kernel device tree, so that the clock starts automatically and the codec is detected. Could you please share your solution?

As it's been a while since Stefano last logged in, I'd like to ask others right away. Maybe FabioEstevam‌ or igorpadykov‌ could help..?

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NXP Employee
NXP Employee

Hi Stefano,

Looks like an issue with your imx-pcm179x machine implementation then.

You may also consider using 'simple-audio-card' bindings as this could avoid creating a machine file.

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Contributor III

I've modified the dts to work with simple-audio-card (GitHub - szuin/imx6ul-MCLK-SAI1: iMX6UL SAI1 MCLK as output ). Now I don't have error while starting the kernel. but no soundcard is available. May be is the codec side. But I cannot enable it before get the SAI1 MCLK out... As before, GPR1 SAI1_MCLK_DIR bit is high but cannot get the MCLK signal on the oscilloscope.

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NXP Employee
NXP Employee

I just looked at sound/soc/codecs/pcm179x.c and it seems you are using the incorrect compatible for the codec.

Documentation/devicetree/bindings/sound/pcm179x.txt says the compatible is "compatible = "ti,pcm1792a", but you use a different one.

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Contributor III

Yes, I know. I've changed the driver to be compatible with ti,pcm179x. The driver that I'm using is this one imx6ul-MCLK-SAI1/pcm179x-i2c.c at master · szuin/imx6ul-MCLK-SAI1 · GitHub 

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NXP Employee
NXP Employee

Stefano,

Take a look at register GPR1 and make sure that bit 19 is set in your case.

On NXP 4.1.15_1.0.0 BSP the GPR setting is done inside the audio machine file sound/soc/fsl/imx-wm8960.c and it is hardcoded to work with SAI2.

On NXP 4.1.15_2.0.0 BSP the GPR setting is done inside the device tree file. On imx6ul-14-14-evk.dtsi we have:

gpr = <&gpr 4 0x100000 0x100000>;

So if your board wants to use SAI1 you would need to change it like this against 4.1.15_2.0.0 BSP:

https://pastebin.com/yeb2rt9F 

I also made a way to set the GPR1 register in a easier way in the mainline kernel:

https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/commit/?h=linux-4.12.y&id=4d... 

,but this method is not available in kernel 4.1.

Hope this helps.

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Contributor III

Hi Fabio,

Thanks for answering. Now I'm working with Linux 4.1.15_2.0.3, I've modified the driver as imx-wm8960.c in order to enable bit GPR1 SAI1_MCLK_DIR. The driver get an error but that bit's value is set to high:

       imx-pcm179x sound2:  ASoC: CPU DAI 202800.sai not registered
       imx-pcm179x sound2: snd_soc_register_card failed (-517)

But MCLK signal doesn't appear in the oscilloscope...

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Contributor III

Hi there,

I'm still having this trouble, so please admin, remove the assumed answered tag.

I've patched the kernel according to [alsa-devel] Applied "ASoC: fsl_sai: Allow setting the SAI MCLK direction" to the asoc tree . This patch enables IOMUXC_GPR_GPR1 SAI_MCLK_DIR using the property fsl,sai-mclk-direction-output. But cannot get MCLK output in MX6UL_PAD_CSI_DATA01 neither MX6UL_PAD_LCD_DATA00.

In addition, I've modified my ALSA driver for PCM179x, in order to set MCLK as output: snd_soc_dai_set_sysclk(codec_dai, 0, data->sysclk, SND_SOC_CLOCK_OUT); But fails in probe function when try to do snd_soc_register_card(&data->card); get the next error from soc_core.c:

       imx-pcm179x sound2:  ASoC: CPU DAI 202800.sai not registered
       imx-pcm179x sound2: snd_soc_register_card failed (-517)

I also tried to modify IOMUXC_GPR_GPR1 SAI_MCLK_DIR, I2S1_TCR2 MSEL and I2S1_TCSR DBGE registers from uboot and also using devmem2. But value assigned to I2S1_TCR2 and I2S1_TCSR cannot be saved, I always get 0x00000000 except in IOMUXC_GPR_GPR1 register.

The source that I used is in this repository

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NXP TechSupport
NXP TechSupport

reason for probe may be kernel version incompatibility and this may be debugged using

AN4553 Using Open Source Debugging Tools for Linux on i.MX Processors
http://www.nxp.com/assets/documents/data/en/application-notes/AN4553.pdf

please try with offical nxp bsps described on

http://www.nxp.com/products/software-and-tools/software-development-tools/i.mx-software-and-tools/i....

Best regards
igor
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Contributor III

Hi!

Thanks for answering. Well, I obtained this driver from the kernel sources and modified to run with my codec requirements. The original driver is working for a wm8731 codec which is connected to SAI2.

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NXP TechSupport
NXP TechSupport

what bsp used in the case ?

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Contributor III

Linux 4.1.15_2.0.3

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NXP TechSupport
NXP TechSupport

Hi Stefano

one can check IOMUXC_GPR_GPR1 SAI_MCLK_DIR field and follow guidelines in
https://community.nxp.com/docs/DOC-334857
also there is example in MX6UL  FreeRTOS  SDK2.2
../boards/evkmcimx6ul/driver_examples/sai

Board Support Packages (7)
SDK2.2_iMX6UL_WIN(REV SDK2.2)
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/i.mx-processors/i.mx-6-pr...

Best regards
igor
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Contributor III

Hi igorpadykov

Thanks for your answer. According to IMX6ULRM file, bit IOMUXC_GPR_GPR1 SAI_MCLK_DIR  sets the direction of SAI1 MCLK when its connected to LCD_DATA00 pin (ALT 8). In my case I'm using MX6UL_PAD_CSI_DATA01 pin (ALT 6)

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Contributor I

We have the same issue. Our custom board uses pin MX6UL_PAD_CSI_DATA01 for SAI1 MCLK. Is SAI1_MCLK_DIR limited to ALT8?

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