iMX6Solo : eMMC boot sequence difference about BOOT_CFG2[7:5]

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iMX6Solo : eMMC boot sequence difference about BOOT_CFG2[7:5]

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koichisakagami
Contributor II

Dear community,
    We are checking a booting from the eMMC (Ver5.0) device.

When Bus configuration is set to 8bit (BOOT_CFG2[7:5]=010) , system is able to boot.

However,
Bus configuration is set to 8bit DDR (BOOT_CFG2[7:5]=110) ,system is not able to boot.

We hope to get the information about difference between them ( boot_cfg2 settings).

[Question]

    Could you tell us  the starting sequence difference ?

For example,
   Is it different in issuing command type ?
   Is it different in issuing command timing ?
... and so on.

Best Regards,
    Koichi Sakagami

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art
NXP Employee
NXP Employee

The possible cause of the issue is that the device starts operating in so-called

eMMC 4.4 compliant boot mode. Please refer to the Table 8-17 of the

i.MX6Solo/DualLite Reference Manual Rev.2 document for details.


Have a great day,
Artur

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685件の閲覧回数
art
NXP Employee
NXP Employee

The possible cause of the issue is that the device starts operating in so-called

eMMC 4.4 compliant boot mode. Please refer to the Table 8-17 of the

i.MX6Solo/DualLite Reference Manual Rev.2 document for details.


Have a great day,
Artur

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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