iMX6Q NXP DDR test Tool Issue

[zb2020]

We are attempting to use the DDR Stress Test Tool to update an iMX6Quad processor. Our CPU is the MCIMX6Q5EYM10AE and we have two MT41K256M16TW107-IT DDR3L devices connected. When we run the DDR Stress Test Tool, we get the following error message:

We are unsure what the "Error: failed to send sync head packet" message means, which is preventing us from debugging this issue.

Can you explain where this error message comes from?

[JorgeCas]

Hello,

The tool is not able to connect with your board.

Please confirm that you board has both USB cables connected (USB data and debug).

Verify that your board is in serial download mode.

Do you have your board configured with secure boot?

Best regards.

[zb2020]

The board is in serial download mode and is not configured with secure boot.
The USB OTG cable is connected, but I'm not sure what you mean by "both USB cables connected (USB data and debug). 

We are also seeing the USB error in U-Boot when trying to load U-Boot via USB:

U-Boot SPL 2023.04-04924-g7341fbb267 (May 01 2025 - 16:26:33 -0400)
Trying to boot from USB SDP
g_dnl_register: failed!, error: -22
SDP dnl register failed: -22
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

We encountered this error after switching the processor from the iMX6DL to the iMX6Q on our custom board. The board with the iMX6DL passed the memory test successfully.
Is there any difference in the USB hardware configuration (USB OTG) between the iMX6DL and iMX6Q?

[JorgeCas]

Hello,

Sorry, I confused the DDR tool for i.MX6 with i.MX8M requirements, in the case of i.MX6Q there is no need to connect debug USB cable.

In your case, the board is not booting in serial download mode, please check that you are following the power up sequence in your device and verify that there are no issues in USB connection.

There is no difference in the USB hardware configuration for i.MX6Q processor.

Best regards.

[zb2020]

I verified the power-up sequence and USB OTG connection.
I tracked down the code where the SPL is failing (in drivers/usb/gadget/ci_udc.c):

/* The QH list must be aligned to 4096 bytes. */

controller.epts = memalign(eplist_align, eplist_sz);

if (!controller.epts){

return -ENOMEM;

}

The SPL fails only with the iMX6Q; there is no issue with the iMX6DL processor.

Any ideas on what could be causing this issue?

[JorgeCas]

Hello,

Thank you for the information.

If you are trying to boot the board without pass the DDR stress test and add the initialization/timing scripts to your build environment, the board will not be able to pass the DDR training.

Best regards.