iMX6DL custom board 32bit DDR dram_cs0#/cs1# select

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iMX6DL custom board 32bit DDR dram_cs0#/cs1# select

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Contributor I

Hi,

I have a iMX6DL custom board, use two MICRON_MT41K128M16JT-125:K. DDR memory chip, 32bit, schematics is below, for this connect, how to config ddr registers? for U8 L2 Pin, need use DRAM_CS0# or DRAM_CS1#?

Thanks!

imx6dl+ddr3.png

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Contributor I

Thanks artur.

Now U7 and U8 havs place on the board, if I use U7 only, can it work?

I have run ddr stress test use U7 only, but when I build u-boot.imx, uart1 not message output.

What is I need to do?

Thanks

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NXP TechSupport
NXP TechSupport

You have to change the MMDC configuration in the u-boot header DCD table to operate in 16-bit wide bus mode. For details, please refer to the Section 3.2 of the attached document.

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Contributor I

For this case, becase U8 use CKE1/ODT1/CLK1+/CLK1-, so I think, U8 will use cs1#

If U8 use cs0#, how to config the CKE1? 

When use cs0#, I check CKE1 not signal.

use Register Programming Aid sheet, DDR stress tool can't run.

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NXP TechSupport
NXP TechSupport

You have to use CS0, CKE0 and ODT0 signals for both DDR chips. Otherwise, the memory will not work.

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NXP TechSupport
NXP TechSupport

For the information on how to configure the DDR controller registers in a custom memory configuration case, please use the following Register Programming Aid sheet:

https://community.nxp.com/docs/DOC-236354

https://community.nxp.com/docs/DOC-105964

For both memory chips, the DRAM_CS0# chip select signal should be used.

Best Regards,

Artur

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