Hello,
I am having problems successfully calibrating the iMX6 dual DDR memory interface on our custom board using the DDR Stress Tester V1.0.3 application tool. We have built 3 of our custom boards, each of which contains 2 iMX6 dual processors. Each of the processors interfaces to a pair of 512MB DDR3 chips (T-topology) for a 1GB total DDR memory per processor. Of the 6 total processors on the 3 boards, only 3 will successfully calibrate using the tool.
The 3 processors that fail DDR calibration are reporting write-leveling calibration values over the 0x2F limit specified in the Stress Tester User Guide. For example, when I calibrated at 396MHz, I get the following results:
"MMDC_MPWLDECTRL0 ch0 after write level cal: 0x0009000C"
"MMDC_MPWLDECTRL1 ch0 after write level cal: 0x0003017F"
I have tried setting WALAT = 1 in the init script (see attached 'gf_default.inc') as suggested by the User Guide, then re-running the cal test but it does not seem to make any difference, I always get value of 0x7F (or very close) for the WL_DL_ABS_OFFSET2. It seems to me that the cal results should change if WALAT is changed? I have also tried calibrating at multiple different freqs throughout the range 350MHz to 528MHz allowed by the tool, with the same results - 0x7F in the WL_DL_ABS_OFFSET2 result. This problem does not occur for the 3 processors that pass calibration - I get write-leveling results well under 0x2F like 0x09, 0x0C etc. I do not think the issue is a layout issue since it occurs for some processors but not others on 3 boards that have identical layouts. Maybe I need to mess with the WL_CYC_DEL setting in the same write leveling delay control register?
I have also tried ignoring the above write-leveling calibration result and proceeding with the DQS gating cal using the tool. When I do this the DQS gating cal fails with the following error message:
"Starting DQS gating calibration...
.............................................ERROR FOUND, we can't get suitable value !!!!
dram test fails for all values."
Does anyone have any idea what I could be doing wrong? I have attached the stress tester tool init script. It uses all the original Freescale script settings except for the WALAT =1 change, and MMDC0_MDCTL register changes necessary for our custom board. Thanks in advance for any help.
- Ted
Original Attachment has been moved to: gf_default.inc.zip
Hello,
Please try recommendations of Igor in the following thread :
"ERROR FOUND" error on DDR Stress tester for 528MHz DDR frequency operataion
Also, please use the i.MX6/7 DDR Stress Test Tool V2.40
Have a great day,
Yuri
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Hi Yuri,
Thanks for your help, I will do as you suggest. Just curious, but why did you suggest trying the new Stress Test Tool? Has there been some problem identified with the old version V1.0.3 of this tool?
Thanks,
Ted
Hi,
Why do not try the recent tool, if it is present and provide some additional options ?
Regards,
Yuri.
Hi Yuri,
Yes I will try the new tool - I have downloaded it but did not find a User Guide. Do I just run the executable? Do I have to reference one of the script files? The readme.txt file said to use the latest "FSL DDR Register Programming Aid" to generate my own script. Where is this programming aid?
Thanks,
Ted
Hi,
You may look at the enclosed Guide from previous release.
As for the Programming Aid :
Regards,
Yuri.
Hi Yuri,
We did have much better success with the newer DDR Stress Tester V2.40. We were able to successfully calibrate all 6 of our processor-DDR interfaces with 400MHz DDR clock. Also able to successfully run the DDR Stress Test with calibration output values at 400MHz. However calibration failed on some the processors when we tried to run with 528MHz DDR clock. We are still seeing processor crashes of our real code although much less frequently, but our real code uses 528MHz DDR clock rather than 400MHz as we used for the calibration. So we're now trying to figure out how to change our code to set the DDR clock for 400MHz...
Thanks,
Ted
HI,
have You tried the following :
-verify the PCB design using "MX6 DRAM Bus Length Check" sheet in
"HW Design Checking List for i.Mx6DQSDL Rev2.9.xlsx"
HW Design Checking List for i.MX6DQSDL
-try to use WALAT = 1 in memory initialization script
-try different DDR_SEL options (11 or 10)
-try using different drive strength for DRAM signals for both i.MX6 and DRAM part
Regards,
Yuri.
Hi Yuri,
Thanks for the ideas, no we have not tried all the items in your list yet but we intend to. In parallel, we are also trying to figure out how to change the I.MX6 DDR frequency to 400MHz.
Could you please check out 'Changing i.MX6D DDR Frequency' in NXP Community? My colleague Mat posted this question on the forum on 12/23. It surprises me that nobody has replied to his question yet, since you responded to my question so quickly. I assume that you work for NXP Freescale, and thus someone from NXP Freescale should be responding to Mat's question as well? How long does it usually take to get a reply?
Thanks again for your help!
Ted
Hello,
I can send You some codes regarding frequency changing from
DDR stress test. Note : DDR stress codes are not provided; so, please
create request / case for it.
1) | Please open www.nxp.com |
2) | On the top level menu, select Support > Sales and Support (http://www.nxp.com/support/sales-and-support:SUPPORTHOME). |
3) | On the bottom of the page, select Hardware & Software. |
4) | Register with your business email to access the technical NXP online support. |
5) | A verification email will be sent to your account. Click the embedded link to verify your access. |
6) | On the NXP online support page, select Contact Support from the top menu and click “submit a new case” to start the process. |
Sometimes it should be needed twice.
Regards,
Yuri.
Thanks Yuri.
Ted