Does anyone knows and could describe the procedure of how to trigger a reset of the board (power off / power on) from software (u-boot application)?
I believe some of the SRC registers should be configured properly to obtain such behaviour.
Thanks very much in advance
Do you mean the command of uboot to reboot the board? If yes, you can use "reset" command in uboot to reboot system, the eventual operation of "reset" command will trigger a wdog reset which will reboot i.MX6 SOC. But it will not reset the PMIC, so it is not a power off/on reset, it only reset our i.MX6 SOC.
If you use "reboot" command in kernel, the PMIC(PFuze) will be also reset by our wdog reset, which will be a power off/on reset.
So, in a word, in uboot, "reset" is to only reset our i.MX6 SOC, in kernel, "reboot" will reset both our i.MX6 SOC and external PMIC which connect its reset pin to our WDOG_B pin.
I have several boards of the same hardware based on mx6dl-sabresd.
When I use "reset" command in u-boot, some boards reset from [WDOG ], but others always reset from [POR ].
I have no idea how to debug and fix it. Could you give your opinion?
Because in uboot, we only trigger wdog reset, and in kernel, when wdog reset, we enable it to output a wdog_b signal which will be connected to PMIC, and cause the whole board power down and power up again, that is why you get POR reset in kernel, but get WDOG in uboot.
Our board config WDOG2 to be the output (MX6DL_PAD_GPIO_1__WDOG2_WDOG_B) and connects it to POR.
When I config WDOG1 to generate wdog_reset, I measured that the WDOG_B is also asserted.
That's why the reset reason is POR.
Could you help? Thanks.
You can just disable the wdog_b signal when you config wdog1 to reset.
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? 2014-3-28?16:13?"ZL Huang" <firstname.lastname@example.org<mailto:email@example.com>> ???
iMX6: how to trigger software reset
reply from ZL Huang<https://community.freescale.com/people/zlhuang?et=watches.email.thread> in i.MX Community - View the full discussion<https://community.freescale.com/message/391480?et=watches.email.thread#391480>
If you want to not trigger WDOG_B signal, please write 0x4 to WCR to issue a wdog reset. If you want to trigger WDOG_B, using 0x14 instead.
You can try it.
The other option is just modify the IOMUX setting of WDOG_B MUX, set it to be other function.
Our board config WDOG2 to be the output (MX6DL_PAD_GPIO_1__WDOG2_WDOG_B).
However, when I write 0x4 to WDOG1_WCR t to generate wdog_reset, I measured that the WDOG_B is also asserted.
I don't know if it is normal.
What should I do to disabe WDOG_B signal ( from WDOG2) before I generate WDOG1 wdog_reset?
No, I meant you can disable WDOG_B pin function, such as set it to be other function, then trigger wdog reset by writting 0x4, then measure this pin to see whether it is asserted when wdog reset the system.
OK, so that means your board design may not good enough. Can you check your board design of WDOG_B pin, does it has a pull up resistor? WHat value? Can you change it to be less than 10K OHm? then monitor this pin's signal to see whether it still assert when we do a pure wdog reset by writting 0x4 to wdog controller register?
The original design has a 100KOhm pull-up resistor, which is alleged reference design from freescale.
We change it to 10KOhm, and it is ok for wdog_reset(WDOG_B is not asserted).
However, it fails for POR reset when we control WDOG_B to be asserted.
The balance value for both POR reset and wdog_reset is 33KOhm.