iMX6, display problem with mipi adv7282-m device source

[gabrielgrange]

We success in display first acquisition from adv7282-m device after a problematic start (see https://community.nxp.com/message/830163 message)

We use PAL video signal and we test without adv7282 progressive format, and with progressive format (mipi clock is double). In these two adv7282 configuration case, we don't reach to synchronize output display image acquisition.

The ADV7282-M output data is 8-bit YCrCb 4:2:2 format and it uses one lane.

Routing MIPI stream into CSI2 is Ok.

But gstreamer command :

gst-launch-1.0 --gst-debug=*:1 -v imxv4l2src device=/dev/video0 ! imxv4l2sink

displays:

 Colors are wrong and there is also a vertical scrolling (see mp4 file). 

If we try to read some VDOA registers (example VDOA_VDOAC(@21E4000), there is a CPU freeze and watch-dog generates reset.

So we try to have more information in IPU configuration, so we add theses two lines un ipu_capture.c :

#undef dev_dbg

#define dev_dbg(dev, format, arg...) {dev_printk(KERN_ERR, dev, format, ##arg);}

We also set to 1 the DEBUG constant in mxc_v4l2_capture.c file

We try to compare two hardware management:

	BASE1 OK	BASE2  HS
Hardware	Toradex Ixora Toradex Apalis module : iMX6 quad Toradex Analogue Camera Adapter	Custom board iMX6 quad plus
Video decoder	adv7280	adv7282-m
Routing	Channel0 CSI0 / IPU0 parallel	Channel1 CSI1 / IPU0 mipi
Linux version	3.14.52 + adv7180.c patch	3.14.52 + adv7282.c driver
LOG file	LOG2_adv7180.txt	LOG2 adv7282-m.txt

Remarks:

Used Linux kernel and root filesystem are the same (only devicetree is different). Some debug traces has been added for adv drivers.

In case of adv7282-m, there is a start the encoder job from drivers/media/platform/mxc/capture/mxc_v4l2_capture.c file.

With adv7280 we don’t know how iMX6 transforms 720x575 acquisitions to 1024x768 output display. There is no trace in LOG2_adv7280.txt file

Our current questions are:

•       Is combinaison one lane, mipi IPU0/CSI1 has been use with iMX6 quad plus design?

•       Why with adv7282-m management, we find ‘In MVC:mxc_streamon’ trace with PFS=0x4 (instead of 0x7 as it appears in LOG2_adv7280.txt file, 0x4 is NA depending on Freescale documentation) ?

•       What are parameters to manage IPU format from MIPI flow?

Original Attachment has been moved to: LOG2_adv7280.txt.zip

Original Attachment has been moved to: LOG2-adv7282-m.txt.zip

[weidong_sun]

Hello Gabriel ,

     According to your description, it seems that you need to add 2 patches for ipu display, detailed information is here:

Sample code for iMX6 SabreSD to use MIPI CSI camera with virtual channel 3 

You should use this: L3.10.17_1.0.0_mipi_camera_virtual_channel_3.zip 3.0 KB

Try it please!

Hope above advice can help you!

Best Regards,

Weidong

[gabrielgrange]

Hello Sun,

Thanks for your fedback. We try to apply adviced pathes but it don't fix IPU management problem we have.
In fact there is a problem if we use patch from drivers/mxc/ipu3/ipu_capture.c because _ipu_smfc_init force mipi source to 0 (instead of 1 in our case) and changes in _ipu_csi_set_mipi_di function generates no diplay, "VIDIOC_DQBUF failed." error message and timeout (see time-out trace in following LOG).

For the moment, it is not a routing problem with the mipi virtual channel #1. The routing seem ok but in the display we get 4 images from mipi source and a wrong YUV decoding (color are not good).

We try to use linux4 kernel (4.1.29 with sabresd target) from krogoth yocto source.
The only way we examine is mxc_v4l2_capture.c file is not as advanced as file there is in 3.14.52 (yocto-jethro).

We still search why there is a IPU configuration problem to display the mipi flow.
If we set ADV7282-M in free-run pattern to color bars, we also get 4 images in the display. So we think it is not depending on analog harware decoder.

How it is possible to configure IPU format & decoding to adjust mipi flow configuration ?

Best regards,

Gabriel GRANGE

U-Boot 2014.04-OTG-PR3213_V0.0.1 (Aug 04 2016 - 11:25:09)

CPU: Freescale i.MX6Q rev1.0 at 792 MHz
Reset cause: WDOG
Board: HTBC-EXXX
I2C: ready
DRAM: 1 GiB
MMC: FSL_SDHC: 0
SF: Detected S25FL164K with page size 256 Bytes, erase size 64 KiB, total 8 MiB
*** Warning - bad CRC, using default environment

No panel detected: default to vga-lvds
Display: vga-lvds (640x480)
In: serial
Out: serial
Err: serial
board_late_init(): MFG_BOOT
Net: using phy at 0
FEC [PRIME]
Press 's' for uboot prompt
BOOTP broadcast 1
*** Unhandled DHCP Option in OFFER/ACK: 42
*** Unhandled DHCP Option in OFFER/ACK: 42
DHCP client bound to address 192.10.3.197
Using FEC device
TFTP from server 192.10.1.224; our IP address is 192.10.3.197
Filename 'u-boot.env'.
Load address: 0x10800000
Loading: #
21.5 KiB/s
done
Bytes transferred = 2783 (adf hex)
Importing environment
BOOT PAR RESEAU + ROOTFS_NFS
BOOTP broadcast 1
*** Unhandled DHCP Option in OFFER/ACK: 42
*** Unhandled DHCP Option in OFFER/ACK: 42
DHCP client bound to address 192.10.3.197
LOAD KERNEL...
Using FEC device
TFTP from server 192.10.1.224; our IP address is 192.10.3.197
Filename 'PR3212-bsp/uImage'.
Load address: 0x12000000
Loading: #################################################################
#################################################################
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######################################
1 MiB/s
done
Bytes transferred = 6515120 (6369b0 hex)
LOAD DEVICETREE...
Using FEC device
TFTP from server 192.10.1.224; our IP address is 192.10.3.197
Filename 'PR3212-bsp/imx6q-EXXX.dtb'.
Load address: 0x18000000
Loading: ########
225.6 KiB/s
done
Bytes transferred = 40223 (9d1f hex)
## Booting kernel from Legacy Image at 12000000 ...
Image Name: Linux-4.1.29-PR3212_V0.0.2
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 6515056 Bytes = 6.2 MiB
Load Address: 10800000
Entry Point: 10800000
Verifying Checksum ... OK
## Flattened Device Tree blob at 18000000
Booting using the fdt blob at 0x18000000
Loading Kernel Image ... OK
Loading Device Tree to 4f54c000, end 4f558d1e ... OK

Starting kernel ...

Booting Linux on physical CPU 0x0
Linux version 4.1.29-PR3212_V0.0.2 (dev@EXXX) (gcc version 5.2.1 20151005 (Linaro GCC 5.2-2015.11-2) ) #33 SMP PREEMPT Tue Sep 20 09:30:23 CEST 2016
CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine model: Centralp i.MX6 Quad Plus for AFP EXXX board
Reserved memory: created CMA memory pool at 0x62000000, size 320 MiB
Reserved memory: initialized node linux,cma, compatible id shared-dma-pool
Memory policy: Data cache writealloc
PERCPU: Embedded 12 pages/cpu @d00f8000 s16960 r8192 d24000 u49152
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 979775
Kernel command line: no_console_suspend=1 console=tty1 console=ttymxc1,115200n8 enable_wait_mode=off vmalloc=400M root=/dev/nfs -o nolock ip=dhcp rootwait nfsroot=192.10.1.224:/work/EXXX/PR3212-bsp/rootfs,v3,tcp fec_macaddr=00:80:97:11:22:33 video=mxcfb0:dev=ldb,LDB-XGA,if=RGB666,bpp=18 fbmem=32M
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 262144 (order: 8, 1048576 bytes)
Inode-cache hash table entries: 131072 (order: 7, 524288 bytes)
Memory: 3558776K/3932156K available (8163K kernel code, 421K rwdata, 2852K rodata, 424K init, 450K bss, 45700K reserved, 327680K cma-reserved, 2260988K highmem)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0xe6800000 - 0xff000000 ( 392 MB)
lowmem : 0x80000000 - 0xe6000000 (1632 MB)
pkmap : 0x7fe00000 - 0x80000000 ( 2 MB)
modules : 0x7f000000 - 0x7fe00000 ( 14 MB)
.text : 0x80008000 - 0x80ac9f64 (11016 kB)
.init : 0x80aca000 - 0x80b34000 ( 424 kB)
.data : 0x80b34000 - 0x80b9d4e0 ( 422 kB)
.bss : 0x80ba0000 - 0x80c108c0 ( 451 kB)
SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
Preemptible hierarchical RCU implementation.
Additional per-CPU info printed with stalls.
NR_IRQS:16 nr_irqs:16 16
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 16 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 16 ways, 1024 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76070001
mxc_clocksource_init 3000000
Switching to timer-based delay loop, resolution 333ns
sched_clock: 32 bits at 3000kHz, resolution 333ns, wraps every 715827882841ns
clocksource mxc_timer1: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 637086815595 ns
Console: colour dummy device 80x30
console [tty1] enabled
Calibrating delay loop (skipped), value calculated using timer frequency.. 6.00 BogoMIPS (lpj=30000)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 4096 (order: 2, 16384 bytes)
Mountpoint-cache hash table entries: 4096 (order: 2, 16384 bytes)
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x10008280 - 0x100082d8
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
Brought up 4 CPUs
SMP: Total of 4 processors activated (24.00 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor ladder
cpuidle: using governor menu
CPU identified as i.MX6QP, silicon rev 1.0
anatop_regulator 20c8000.anatop:regulator-vddcore@140: Failed to read a valid default voltage selector.
anatop_regulator: probe of 20c8000.anatop:regulator-vddcore@140 failed with error -22
Centralp PATCH for IOMUXC_GPR1 and good RMII clock management
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
imx6q-pinctrl 20e0000.iomuxc: initialized IMX pinctrl driver
imx-gpc 20dc000.gpc: no fsl,ldo-bypass found!
mxs-dma 110000.dma-apbh: initialized
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
2000000.aips-bus:usbphy_nop1 supply vcc not found, using dummy regulator
2000000.aips-bus:usbphy_nop2 supply vcc not found, using dummy regulator
i2c i2c-0: IMX I2C adapter registered
i2c i2c-0: can't use DMA
i2c i2c-1: IMX I2C adapter registered
i2c i2c-1: can't use DMA
i2c i2c-2: IMX I2C adapter registered
i2c i2c-2: can't use DMA
media: Linux media interface: v0.10
Linux video capture interface: v2.00
pps_core: LinuxPPS API ver. 1 registered
pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
PTP clock support registered
imx-ipuv3 2400000.ipu: IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7)
imx-ipuv3 2800000.ipu: IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7)
imx-prg 21cc000.prg: driver probed
imx-prg 21cd000.prg: driver probed
imx-pre 21c8000.pre: driver probed
imx-pre 21c9000.pre: driver probed
imx-pre 21ca000.pre: driver probed
imx-pre 21cb000.pre: driver probed
mxc_mipi_csi2 21dc000.mipi_csi: i.MX MIPI CSI2 driver probed
mxc_mipi_csi2 21dc000.mipi_csi: i.MX MIPI CSI2 dphy version is 0x3130302a
MIPI CSI2 driver module loaded
Advanced Linux Sound Architecture Driver Initialized.
Bluetooth: Core ver 2.20
NET: Registered protocol family 31
Bluetooth: HCI device and connection manager initialized
Bluetooth: HCI socket layer initialized
Bluetooth: L2CAP socket layer initialized
Bluetooth: SCO socket layer initialized
Switched to clocksource mxc_timer1
NET: Registered protocol family 2
TCP established hash table entries: 16384 (order: 4, 65536 bytes)
TCP bind hash table entries: 16384 (order: 5, 131072 bytes)
TCP: Hash tables configured (established 16384 bind 16384)
UDP hash table entries: 1024 (order: 3, 32768 bytes)
UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
CPU PMU: Failed to parse /soc/pmu/interrupt-affinity[0]
hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
imx rpmsg driver is registered.
Bus freq driver module loaded
futex hash table entries: 1024 (order: 4, 65536 bytes)
VFS: Disk quotas dquot_6.6.0
VFS: Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
NFS: Registering the id_resolver key type
Key type id_resolver registered
Key type id_legacy registered
jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
fuse init (API version 7.23)
bounce: pool size: 64 pages
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
backlight supply power not found, using dummy regulator
MIPI DSI driver module loaded
MIPI DSI driver module loaded
mxc_sdc_fb fb@0: registered mxc display driver ldb
imx-ipuv3 2800000.ipu: IPU DMFC DP HIGH RESOLUTION: 1(0,1), 5B(2~5), 5F(6,7)
Console: switching to colour frame buffer device 128x48
imx-sdma 20ec000.sdma: no iram assigned, using external mem
imx-sdma 20ec000.sdma: no event needs to be remapped
imx-sdma 20ec000.sdma: loaded firmware 3.3
imx-sdma 20ec000.sdma: initialized
21e8000.serial: ttymxc1 at MMIO 0x21e8000 (irq = 291, base_baud = 5000000) is a IMX
console [ttymxc1] enabled
imx sema4 driver is registered.
[drm] Initialized drm 1.1.0 20060810
[drm] Initialized vivante 1.0.0 20120216 on minor 0
brd: module loaded
loop: module loaded
at24 2-0050: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
spi_imx 2008000.ecspi: probed
CAN device driver interface
2188000.ethernet supply phy not found, using dummy regulator
pps pps0: new PPS source ptp0
libphy: fec_enet_mii_bus: probed
fec 2188000.ethernet eth0: registered PHC device 0
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci-mxc: Freescale On-Chip EHCI Host driver
usbcore: registered new interface driver usb-storage
usbcore: registered new interface driver usb_ehset_test
2184800.usbmisc supply vbus-wakeup not found, using dummy regulator
ci_hdrc ci_hdrc.1: EHCI Host Controller
ci_hdrc ci_hdrc.1: new USB bus registered, assigned bus number 1
ci_hdrc ci_hdrc.1: USB 2.0 started, EHCI 1.00
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
mousedev: PS/2 mouse device common for all mice
snvs_rtc 20cc000.snvs:snvs-rtc-lp: rtc core: registered 20cc000.snvs:snvs-r as rtc0
i2c /dev entries driver
In MVC:camera_init
In MVC: init_camera_struct
Video device registered: Mxc Camera #0
In adv7282_init
adv7282 0-0021: Start adv7282 probe...
adv7282 0-0021: adv7282_probe sensor data is at 80bfd998
adv7282 0-0021: set io voltage ok
adv7282 0-0021: set core voltage ok
adv7282 0-0021: set analog voltage ok
adv7282 0-0021: set pll voltage ok
adv7282 0-0021: adv7282_write_reg:write @0x0f=0x80
usb 1-1: new full-speed USB device number 2 using ci_hdrc
adv7282 0-0021: adv7282_write_reg:write @0x0f=0x00
adv7282 0-0021: Read v_channel_id=1 from devicetree.
adv7282 0-0021: Read ipu_id=0 from devicetree.
adv7282 0-0021: Read csi_id=1 from devicetree.
adv7282 0-0021: adv7282_probe:adv7282 probe i2c address is 0x21
adv7282 0-0021: adv7282_read:read @0x11=0x42
adv7282 0-0021: adv7282_probe:ADV7282_IDENT=42
adv7282 0-0021: mipi_csi2_get_status function is done.
adv7282 0-0021: ADV7282_Dbg: mipi get_error1/MIPI_CSI_ERR1=00000000
adv7282 0-0021: ADV7282_Dbg: mipi get_error2/MIPI_CSI_ERR2=00000000
adv7282 0-0021: ADV7282_Dbg: mipi virtual channel:1
adv7282 0-0021: ADV7282_Dbg: mipi csi config:1
adv7282 0-0021: ADV7282_Dbg: mipi ipu config:0
adv7282 0-0021: mipi_csi2 config in YUV442 configuration.
mipi_csi2_reset: Centralp mipi PATCH to adjust CLOCK... value=0x26
adv7282 0-0021: In adv7282:adv7282_hard_reset
adv7282 0-0021: adv7282_write_reg:write @0x0f=0x00
adv7282 0-0021: adv7282_write_reg:write @0x00=0x04
adv7282 0-0021: adv7282_write_reg:write @0x0c=0x37
adv7282 0-0021: adv7282_write_reg:write @0x02=0x84
adv7282 0-0021: adv7282_write_reg:write @0x14=0x11
adv7282 0-0021: adv7282_write_reg:write @0x03=0x4e
adv7282 0-0021: adv7282_write_reg:write @0x04=0x57
adv7282 0-0021: adv7282_write_reg:write @0x13=0x00
adv7282 0-0021: adv7282_write_reg:write @0x17=0x41
adv7282 0-0021: adv7282_write_reg:write @0x1d=0xc0
adv7282 0-0021: adv7282_write_reg:write @0x52=0xcd
adv7282 0-0021: adv7282_write_reg:write @0x80=0x51
adv7282 0-0021: adv7282_write_reg:write @0x81=0x51
adv7282 0-0021: adv7282_write_reg:write @0x82=0x68
adv7282 0-0021: adv7282_write_reg:write @0x5d=0x1c
adv7282 0-0021: adv7282_write_reg:write @0x5e=0x1c
adv7282 0-0021: adv7282_write_reg:write @0xfd=0x84
adv7282 0-0021: adv7282_write_reg:write @0xfe=0x88
Set virtual channel #1 for ADV7282-m mipi frames
adv7282 0-0021: adv7282_csi_write:csi_write @0x0d=0x40
adv7282 0-0021: adv7282_csi_read:csi_read @0x0d=0x40
VC_REF=0x40
adv7282 0-0021: adv7282_csi_write:csi_write @0xde=0x02
adv7282 0-0021: adv7282_csi_write:csi_write @0xd2=0xf7
adv7282 0-0021: adv7282_csi_write:csi_write @0xd8=0x65
adv7282 0-0021: adv7282_csi_write:csi_write @0xe0=0x09
adv7282 0-0021: adv7282_csi_write:csi_write @0x2c=0x00
adv7282 0-0021: adv7282_csi_write:csi_write @0x00=0x00
type is 2 (expect 2)
num ioctls is 13
adv7282 0-0021: adv7282_read:read @0x10=0x4a
adv7282 0-0021: ADV7282: Dbg: STATUS1=0x4A
adv7282 0-0021: adv7282_read:read @0x12=0x00
adv7282 0-0021: ADV7282: Dbg: STATUS2=0x00
adv7282 0-0021: adv7282_read:read @0x13=0x7c
adv7282 0-0021: ADV7282: Dbg: STATUS3=0x7C
adv7282 0-0021: In adv7282_get_std
adv7282 0-0021: adv7282_read:read @0x10=0x4a
adv7282_get_std: status1=0x4A, locked=0, standard=0x40
In MVC: mxc_v4l2_master_attach
slave.name = adv7282
master.name = mxc_v4l2_cap1
adv7282 0-0021: adv7282:ioctl_s_power, on=0
adv7282 0-0021: adv7282:ioctl_g_fmt_cap
Returning size of 720x625
End of mxc_v4l2_master_attach: v2f pix widthxheight 288 x 352
End of mxc_v4l2_master_attach: crop_bounds widthxheight 720 x 625
End of mxc_v4l2_master_attach: crop_defrect widthxheight 720 x 625
End of mxc_v4l2_master_attach: crop_current widthxheight 720 x 625
v4l2 device created, status is 0
Dbg: mipi csi2 receive sensor clk! mipi_csi2_dphy_status=0x300
Dbg: mipi csi2 can receive data...mipi_csi2_get_error1=0
adv7282 0-0021: ADV7282_Dbg: mipi get_error1/MIPI_CSI_ERR1=00000000
adv7282 0-0021: ADV7282_Dbg: mipi get_error2/MIPI_CSI_ERR2=00000000
adv7282_probe: init done, ret=0
adv7282_init : done, err=0
mxc_v4l2_output v4l2_out: V4L2 device registered as video16
mxc_v4l2_output v4l2_out: V4L2 device registered as video17
lm75 1-0048: hwmon0: sensor 'ds75'
imx2-wdt 20bc000.wdog: timeout 60 sec (nowayout=0)
Bluetooth: HCI UART driver ver 2.3
Bluetooth: HCI UART protocol H4 registered
Bluetooth: HCI UART protocol BCSP registered
Bluetooth: HCI UART protocol ATH3K registered
usbcore: registered new interface driver bcm203x
usbcore: registered new interface driver btusb
usbcore: registered new interface driver ath3k
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
sdhci-pltfm: SDHCI platform and OF driver helper
/soc/aips-bus@02100000/usdhc@0219c000: voltage-ranges unspecified
sdhci-esdhc-imx 219c000.usdhc: No vqmmc regulator found
mmc3: SDHCI controller on 219c000.usdhc [219c000.usdhc] using ADMA
mxc_vpu 2040000.vpu_fsl: VPU initialized
mxc_vdoa 21e4000.vdoa: i.MX Video Data Order Adapter(VDOA) driver probed
caam 2100000.caam: Entropy delay = 3200
caam 2100000.caam: Instantiated RNG4 SH0
caam 2100000.caam: Instantiated RNG4 SH1
caam 2100000.caam: device ID = 0x0a16010000000000 (Era -524)
caam 2100000.caam: job rings = 2, qi = 0
caam algorithms registered in /proc/crypto
caam_jr 2101000.jr0: registering rng-caam
platform caam_sm: blkkey_ex: 4 keystore units available
platform caam_sm: 64-bit clear key:
platform caam_sm: [0000] 00 01 02 03 04 0f 06 07
platform caam_sm: 64-bit black key:
platform caam_sm: [0000] f5 bc 3b 1b 12 60 05 be
platform caam_sm: [0008] 7d 9c a9 4c 53 2f b0 a5
platform caam_sm: 128-bit clear key:
platform caam_sm: [0000] 00 01 02 03 04 0f 06 07
platform caam_sm: [0008] 08 09 0a 0b 0c 0d 0e 0f
platform caam_sm: 128-bit black key:
platform caam_sm: [0000] 72 06 26 39 5a 56 b5 9b
platform caam_sm: [0008] ac b4 82 31 4d 83 a1 cc
platform caam_sm: 192-bit clear key:
platform caam_sm: [0000] 00 01 02 03 04 0f 06 07
mmc3: new DDR MMC card at address 0001
mmcblk3: mmc3:0001 VM010B 7.28 GiB
mmcblk3boot0: mmc3:0001 VM010B partition 1 512 KiB
mmcblk3boot1: mmc3:0001 VM010B partition 2 512 KiB
mmcblk3rpmb: mmc3:0001 VM010B partition 3 512 KiB
mmcblk3: p1
platform caam_sm: [0008] 08 09 0a 0b 0c 0d 0e 0f
platform caam_sm: [0016] 10 11 12 13 14 15 16 17
platform caam_sm: 192-bit black key:
platform caam_sm: [0000] 6c 25 0f 98 a4 e7 19 3c
platform caam_sm: [0008] 27 74 5e 8c be 95 c9 83
platform caam_sm: [0016] a5 d7 28 9f 2c 82 42 49
platform caam_sm: [0024] 64 c3 d9 5c 03 55 6a 6f
platform caam_sm: 256-bit clear key:
platform caam_sm: [0000] 00 01 02 03 04 0f 06 07
platform caam_sm: [0008] 08 09 0a 0b 0c 0d 0e 0f
platform caam_sm: [0016] 10 11 12 13 14 15 16 17
platform caam_sm: [0024] 18 19 1a 1b 1c 1d 1e 1f
platform caam_sm: 256-bit black key:
platform caam_sm: [0000] 77 f5 50 d3 a4 f1 b9 10
platform caam_sm: [0008] be de 77 70 24 a7 d0 9f
platform caam_sm: [0016] 05 68 02 94 fd f2 8e e9
platform caam_sm: [0024] 57 e7 b4 58 a6 6c e7 8e
platform caam_sm: 64-bit unwritten blob:
platform caam_sm: [0000] 00 00 00 00 00 00 00 00
platform caam_sm: [0008] 00 00 00 00 00 00 00 00
platform caam_sm: [0016] 00 00 00 00 00 00 00 00
platform caam_sm: [0024] 00 00 00 00 00 00 00 00
platform caam_sm: [0032] 00 00 00 00 00 00 00 00
platform caam_sm: [0040] 00 00 00 00 00 00 00 00
platform caam_sm: [0048] 00 00 00 00 00 00 00 00
platform caam_sm: [0056] 00 00 00 00 00 00 00 00
platform caam_sm: [0064] 00 00 00 00 00 00 00 00
platform caam_sm: [0072] 00 00 00 00 00 00 00 00
platform caam_sm: [0080] 00 00 00 00 00 00 00 00
platform caam_sm: [0088] 00 00 00 00 00 00 00 00
platform caam_sm: 128-bit unwritten blob:
platform caam_sm: [0000] 00 00 00 00 00 00 00 00
platform caam_sm: [0008] 00 00 00 00 00 00 00 00
platform caam_sm: [0016] 00 00 00 00 00 00 00 00
platform caam_sm: [0024] 00 00 00 00 00 00 00 00
platform caam_sm: [0032] 00 00 00 00 00 00 00 00
platform caam_sm: [0040] 00 00 00 00 00 00 00 00
platform caam_sm: [0048] 00 00 00 00 00 00 00 00
platform caam_sm: [0056] 00 00 00 00 00 00 00 00
platform caam_sm: [0064] 00 00 00 00 00 00 00 00
platform caam_sm: [0072] 00 00 00 00 00 00 00 00
platform caam_sm: [0080] 00 00 00 00 00 00 00 00
platform caam_sm: [0088] 00 00 00 00 00 00 00 00
platform caam_sm: 196-bit unwritten blob:
platform caam_sm: [0000] 00 00 00 00 00 00 00 00
platform caam_sm: [0008] 00 00 00 00 00 00 00 00
platform caam_sm: [0016] 00 00 00 00 00 00 00 00
platform caam_sm: [0024] 00 00 00 00 00 00 00 00
platform caam_sm: [0032] 00 00 00 00 00 00 00 00
platform caam_sm: [0040] 00 00 00 00 00 00 00 00
platform caam_sm: [0048] 00 00 00 00 00 00 00 00
platform caam_sm: [0056] 00 00 00 00 00 00 00 00
platform caam_sm: [0064] 00 00 00 00 00 00 00 00
platform caam_sm: [0072] 00 00 00 00 00 00 00 00
platform caam_sm: [0080] 00 00 00 00 00 00 00 00
platform caam_sm: [0088] 00 00 00 00 00 00 00 00
platform caam_sm: 256-bit unwritten blob:
platform caam_sm: [0000] 00 00 00 00 00 00 00 00
platform caam_sm: [0008] 00 00 00 00 00 00 00 00
platform caam_sm: [0016] 00 00 00 00 00 00 00 00
platform caam_sm: [0024] 00 00 00 00 00 00 00 00
platform caam_sm: [0032] 00 00 00 00 00 00 00 00
platform caam_sm: [0040] 00 00 00 00 00 00 00 00
platform caam_sm: [0048] 00 00 00 00 00 00 00 00
platform caam_sm: [0056] 00 00 00 00 00 00 00 00
platform caam_sm: [0064] 00 00 00 00 00 00 00 00
platform caam_sm: [0072] 00 00 00 00 00 00 00 00
platform caam_sm: [0080] 00 00 00 00 00 00 00 00
platform caam_sm: [0088] 00 00 00 00 00 00 00 00
platform caam_sm: 64-bit black key in blob:
platform caam_sm: [0000] a1 aa 51 e2 1a 78 89 99
platform caam_sm: [0008] 0d 01 88 c5 16 6b c3 ce
platform caam_sm: [0016] 01 11 27 e1 64 fc 2e 4f
platform caam_sm: [0024] 04 15 59 7b a2 cc 0d 3f
platform caam_sm: [0032] b7 a1 76 4d 0f d0 47 e3
platform caam_sm: [0040] e3 be c3 4b ea 74 07 78
platform caam_sm: [0048] 92 44 9f a2 9f 16 0e d7
platform caam_sm: [0056] 00 00 00 00 00 00 00 00
platform caam_sm: [0064] 00 00 00 00 00 00 00 00
platform caam_sm: [0072] 00 00 00 00 00 00 00 00
platform caam_sm: [0080] 00 00 00 00 00 00 00 00
platform caam_sm: [0088] 00 00 00 00 00 00 00 00
platform caam_sm: 128-bit black key in blob:
platform caam_sm: [0000] 20 5f a2 20 94 51 87 8e
platform caam_sm: [0008] ec 94 d8 b3 cc 24 00 9f
platform caam_sm: [0016] 23 1a 76 17 1c 53 d9 fc
platform caam_sm: [0024] 56 8a 97 23 6a 69 b4 68
platform caam_sm: [0032] e1 ad 97 02 e1 c5 1f 7f
platform caam_sm: [0040] ef cb 51 58 83 d3 35 c0
platform caam_sm: [0048] d8 86 d9 7b 70 43 12 8a
platform caam_sm: [0056] c5 14 2b 1b cb 23 4e 82
platform caam_sm: [0064] 00 00 00 00 00 00 00 00
platform caam_sm: [0072] 00 00 00 00 00 00 00 00
platform caam_sm: [0080] 00 00 00 00 00 00 00 00
platform caam_sm: [0088] 00 00 00 00 00 00 00 00
platform caam_sm: 192-bit black key in blob:
platform caam_sm: [0000] e4 37 33 8e 96 85 89 c2
platform caam_sm: [0008] df 65 bf 80 f4 7b 84 b8
platform caam_sm: [0016] 95 02 6f 1b bf 89 60 68
platform caam_sm: [0024] 4d a6 4c 62 a2 7a b7 ed
platform caam_sm: [0032] 6c f4 dc ce fc 34 66 87
platform caam_sm: [0040] bb 24 da 01 c5 09 fb ac
platform caam_sm: [0048] 4c 75 1c 12 6d 77 6c b3
platform caam_sm: [0056] 2d ae b7 15 4e 24 f9 91
platform caam_sm: [0064] ab 5f 42 56 24 6f 4d ac
platform caam_sm: [0072] 00 00 00 00 00 00 00 00
platform caam_sm: [0080] 00 00 00 00 00 00 00 00
platform caam_sm: [0088] 00 00 00 00 00 00 00 00
platform caam_sm: 256-bit black key in blob:
platform caam_sm: [0000] 97 c4 1f 6a e8 63 a3 82
platform caam_sm: [0008] 02 b5 c8 9b 84 0d 03 b8
platform caam_sm: [0016] 78 92 5b 03 b9 df a4 5e
platform caam_sm: [0024] 2b 98 af 2e 17 19 2b 5e
platform caam_sm: [0032] 70 00 72 ca dc 9a a0 1e
platform caam_sm: [0040] 03 ec 96 fb f8 97 6c 18
platform caam_sm: [0048] 30 89 15 9c f2 bd bd f3
platform caam_sm: [0056] d5 02 0d 4e ad 09 5c b1
platform caam_sm: [0064] 3f ab 10 52 ee 78 4a 68
platform caam_sm: [0072] 06 d1 01 c1 1e 69 50 3b
platform caam_sm: [0080] 00 00 00 00 00 00 00 00
platform caam_sm: [0088] 00 00 00 00 00 00 00 00
platform caam_sm: restored 64-bit black key:
platform caam_sm: [0000] 35 89 54 6f 97 d7 63 9b
platform caam_sm: [0008] 4c ff 14 68 d7 fb 23 bc
platform caam_sm: restored 128-bit black key:
platform caam_sm: [0000] 72 06 26 39 5a 56 b5 9b
platform caam_sm: [0008] ac b4 82 31 4d 83 a1 cc
platform caam_sm: restored 192-bit black key:
platform caam_sm: [0000] 6c 25 0f 98 a4 e7 19 3c
platform caam_sm: [0008] 27 74 5e 8c be 95 c9 83
platform caam_sm: [0016] 14 11 69 32 b2 56 88 e1
platform caam_sm: [0024] ac 1e b6 5f 10 96 b2 27
platform caam_sm: restored 256-bit black key:
platform caam_sm: [0000] 77 f5 50 d3 a4 f1 b9 10
platform caam_sm: [0008] be de 77 70 24 a7 d0 9f
platform caam_sm: [0016] 05 68 02 94 fd f2 8e e9
platform caam_sm: [0024] 57 e7 b4 58 a6 6c e7 8e
snvs-secvio 20cc000.caam-snvs: can't get snvs clock
snvs-secvio 20cc000.caam-snvs: violation handlers armed - non-secure state
input: Microchip Technology Inc. AR1100 HID-MOUSE as /devices/soc0/soc/2100000.aips-bus/2184200.usb/ci_hdrc.1/usb1/1-1/1-1:1.0/0003:04D8:0C02.0001/input/input0
hid-generic 0003:04D8:0C02.0001: input: USB HID v1.11 Mouse [Microchip Technology Inc. AR1100 HID-MOUSE] on usb-ci_hdrc.1-1/input0
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
fsl-asrc 2034000.asrc: driver registered
NET: Registered protocol family 26
NET: Registered protocol family 10
sit: IPv6 over IPv4 tunneling driver
NET: Registered protocol family 17
can: controller area network core (rev 20120528 abi 9)
NET: Registered protocol family 29
can: raw protocol (rev 20120528)
can: broadcast manager protocol (rev 20120528 t)
can: netlink gateway (rev 20130117) max_hops=1
Bluetooth: RFCOMM TTY layer initialized
Bluetooth: RFCOMM socket layer initialized
Bluetooth: RFCOMM ver 1.11
Bluetooth: BNEP (Ethernet Emulation) ver 1.3
Bluetooth: BNEP filters: protocol multicast
Bluetooth: BNEP socket layer initialized
Bluetooth: HIDP (Human Interface Emulation) ver 1.2
Bluetooth: HIDP socket layer initialized
8021q: 802.1Q VLAN Support v1.8
Key type dns_resolver registered
cpu cpu0: failed to get regulators
imx6q-cpufreq: probe of imx6q-cpufreq.0 failed with error -2
dhd_module_init in
snvs_rtc 20cc000.snvs:snvs-rtc-lp: setting system clock to 2016-09-02 08:59:26 UTC (1472806766)
fec 2188000.ethernet eth0: Freescale FEC PHY driver [Micrel KSZ8081 or KSZ8091] (mii_bus:phy_addr=2188000.ethernet:00, irq=-1)
IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
fec 2188000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx
IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
Sending DHCP requests ., OK
IP-Config: Got DHCP answer from 192.10.0.195, my address is 192.10.3.197
IP-Config: Complete:
device=eth0, hwaddr=00:80:97:11:22:33, ipaddr=192.10.3.197, mask=255.255.252.0, gw=192.10.0.195
host=192.10.3.197, domain=, nis-domain=(none)
bootserver=0.0.0.0, rootserver=192.10.1.224, rootpath=
nameserver0=192.9.201.214
usb_otg_vbus: disabling
ALSA device list:
No soundcards found.
VFS: Mounted root (nfs filesystem) readonly on device 0:14.
devtmpfs: mounted
Freeing unused kernel memory: 424K (80aca000 - 80b34000)
INIT: version 2.88 booting
Starting udev
udevd[190]: starting version 3.1.5
random: udevd urandom read with 86 bits of entropy available
bootlogd: cannot allocate pseudo tty: No such file or directory
INIT: Entering runlevel: 5
Configuring network interfaces... random: nonblocking pool is initialized
ifup skipped for nfsroot interface eth0
run-parts: /etc/network/if-pre-up.d/nfsroot: exit status 1
Starting syslogd/klogd: done

Poky (Yocto Project Reference Distro) 2.1.1 imx6qpsabreauto /dev/ttymxc1

imx6qpsabreauto login: root
root@imx6qpsabreauto:~# /unit_tests/mxc_v4l2_tvin.out -720 -ih 576 -ow 720 -oh 576 -fr 30 -m 1

In MVC: mxc_v4l_open
device name is Mxc Camera
adv7282 0-0021: adv7282:ioctl_g_ifparm
adv7282 0-0021: adv7282:ioctl_g_fmt_cap
Returning size of 720x625
End of mxc_v4l_open: v2f pix widthxheight 288 x 352
End of mxc_v4l_open: crop_bounds widthxheight 720 x 625
End of mxc_v4l_open: crop_defrect widthxheight 720 x 625
End of mxc_v4l_open: crop_current widthxheight 720 x 625
On Open: Input to ipu size is 720 x 625
adv7282 0-0021: adv7282:ioctl_s_power, on=1
adv7282 0-0021: adv7282_write_reg:write @0x0f=0x04
adv7282 0-0021: In adv7282:ioctl_init
adv7282 0-0021: adv7282:ioctl_dev_init
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl 80685600
case VIDIOC_QUERYCAP
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c02c5651
TV decoder chip is adv7282-m_decoIn MVC:mxc_v4l_ioctl

der
In MVC: mxc_v4l_do_ioctl c0045627
case VIDIOC_S_INPUT
In MVC:mxc_streamoff
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl 80085617
case VIDIOC_G_STD
In mxc_v4l2_g_std
adv7282 0-0021: adv7282:ioctl_g_fmt_cap
adv7282 0-0021: In adv7282_get_std
adv7282 0-0021: adv7282_read:read @0x10=0x4a
adv7282_get_std: status1=0x4A, locked=0, standard=0x40
MVC: mxc_v4l2_g_std: Changing standard
In mxc_v4l2_s_std ffffff
ERROR: unrecognized std! ffffff (PAL=ff, NTSC=b000
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl 40085618
case VIDIOC_S_STD
In mxc_v4l2_s_std ffffff
ERROR: unrecognized std! ffffff (PAL=ff, NTSC=b000
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c02c563a
case VIDIOC_CROPCAP
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0cc5616
case VIDIOC_S_PARM
In mxc_v4l2_s_param
adv7282 0-0021: In adv7282:ioctl_g_parm
type is V4L2_BUF_TYPE_VIDEO_CAPTURE
Current capabilities are 0
Current capturemode is 0 change to 0
Current framerate is 30 change to 0
adv7282 0-0021: In adv7282:ioctl_s_parm
adv7282 0-0021: adv7282:ioctl_g_ifparm
clock_curr=mclk=0
adv7282 0-0021: adv7282:ioctl_g_fmt_cap
Returning size of 720x625
g_fmt_cap returns widthxheight of input as 720 x 625
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0cc5605
case VIDIOC_S_FMT
In MVC: mxc_v4l2_s_fmt
type=V4L2_BUF_TYPE_VIDEO_CAPTURE
End of mxc_v4l2_s_fmt: v2f pix widthxheight 720 x 576
End of mxc_v4l2_s_fmt: crop_bounds widthxheight 720 x 625
End of mxc_v4l2_s_fmt: crop_defrect widthxheight 720 x 625
End of mxc_v4l2_s_fmt: crop_current widthxheight 720 x 576
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0cc5604
case VIDIOC_G_FMT
In MVC: mxc_v4l2_g_fmt type=1
type is V4L2_BUF_TYPE_VIDEO_CAPTURE
End of mxc_v4l2_g_fmt: v2f pix widthxheight 720 x 576
End of mxc_v4l2_g_fmt: crop_bounds widthxheight 720 x 625
End of mxc_v4l2_g_fmt: crop_defrect widthxheight 720 x 625
End of mxc_v4l2_g_fmt: crop_current widthxheight 720 x 576
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0145608
case VIDIOC_REQBUFS
In MVC:mxc_streamoff
MVC: In mxc_free_frame_buf
In MVC:mxc_allocate_frame_buf - size=829440
driver=mxc_vout, card=DISP4 FG, bus=, version=0x0004011d, capabilities=0x84200002
fmt RGB565: fourcc = 0x50424752
fmt BGR24: fourcc = 0x33524742
fmt RGB24: fourcc = 0x33424752
fmt RGB32: fourcc = 0x34424752
fmt BGR32: foIn MVC:mxc_v4l_ioctl
urcc = 0x34524742
fmt NV12: fourIn MVC: mxc_v4l_do_ioctl c0445609
cc = 0x3231564e
fmt UYVY: fourcc case VIDIOC_QUERYBUF
= 0x59565955
fmt YUYV: fourcc =In MVC:mxc_v4l2_buffer_status
0x56595559
fmt YUV422 planar: fIn MVC:mxc_mmap
ourcc = 0x50323234
fmt YUV444: f pgoff=0x62300, start=0x76a99000, end=0x76b64000
ourcc = 0x34343459
fmt YUV420: fIn MVC:mxc_v4l_ioctl
ourcc = 0x32315559
fmt YVU420: fIn MVC: mxc_v4l_do_ioctl c0445609
ourcc = 0x32315659
fmt TILED NV1 case VIDIOC_QUERYBUF
2P: fourcc = 0x50564e54
fmt TILEIn MVC:mxc_v4l2_buffer_status
D NV12F: fourcc = 0x46564e54
fmtIn MVC:mxc_mmap
YUV444 planar: fourcc = 0x503434 pgoff=0x62400, start=0x769ce000, end=0x76a9900034
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0445609
case VIDIOC_QUERYBUF
In MVC:mxc_v4l2_buffer_status
In MVC:mxc_mmap
pgoff=0x62500, start=0x76903000, end=0x769ce000
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c044560f
case VIDIOC_QBUF
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c044560f
case VIDIOC_QBUF
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c044560f
case VIDIOC_QBUF
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl 40045612
case VIDIOC_STREAMON
In MVC:mxc_streamon
start time = 1472806801 s, 546355In MVC:mxc_v4l_ioctlus
In MVC: mxc_v4l_do_ioctl 80085617
case VIDIOC_G_STD
In mxc_v4l2_g_std
adv7282 0-0021: adv7282:ioctl_g_fmt_cap
adv7282 0-0021: In adv7282_get_std
adv7282 0-0021: adv7282_read:read @0x10=0x4a
adv7282_get_std: status1=0x4A, locked=0, standard=0x40
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0445611
case VIDIOC_DQBUF
In MVC:mxc_v4l_dqueue
ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0
VIDIOC_DQBUF failed.
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl 40045613
case VIDIOC_STREAMOFF
In MVC:mxc_streamoff
In MVC:mxc_free_frames
In MVC:mxc_v4l_close
In MVC:mxc_streamoff
adv7282 0-0021: adv7282:ioctl_s_power, on=0
mxc_v4l_close: release resource
MVC: In mxc_free_frame_buf
In MVC:mxc_free_frames
root@imx6qpsabreauto:~#

[weidong_sun]

Hello Gabriel,

     I discussed your question with my colleague from i.MX Expert team, Suggestions from him are below :

(1) Don't use gstreamer to preview TVIN video on MIPI port.

Each frame of ADV7282-M's output video is made up of an odd filed and an even field,  there are some issues with gstreamer plugin, so gstreamer can't handle the video correctly.

(2)Only using odd filed or even field in adv7282-m driver.

It means we can close one of both fields, and only output the other to MIPI port, at same time, set resolution to be 720x240 or 720x288

(3) Using mxc_tvin_test to capture video input on MIPI interface

Probobly you need to adjust some source code of mxc_tvin_test, but it's not difficult.

(4) About adv7282-m driver

One of our customers also used samlilar solution, driver in attachments is from customer, not released by NXP, but you can refer to it!

(5) Deinterlace about ADV7282-M's output

MIPI port doesn't know which field is odd or even, so the result of deinterlace is not ideal.

Because we don't have ready-made adv7280-m solution, only give you some suggestions!!

Hope above information can help you!

Best Regards,

Weidong

[gabrielgrange]

Thanks for your reply,

We continue to work to solve this problem. We use 'MIPI-CSI2 Perepherical on i.MX6 MPUs, Application Note, Rev. 0, 07/2016 document to check iMX6 registers configurations' document to make checks.

We use adv7282m in progressive mode. 

We still have an acquisition format and synchronization problem in with mipi video flow.

See latest result. We get 8 images (instead of 1) and scrolling down problem.

We use freescale capture tool :

       /unit_tests/mxc_v4l2_tvin.out  -ow 1024 -oh 768 -ol 0 -ot 0

We think there is a special ipu configuration to do. The OV5640 example camera use two lanes (adv7282m uses only one lane).

Extra mipi or ipu synchronization informations to help us will be welcome.

Regards,

G.Grange

[qiang_li-mpu_se]

From your dumpped IDMAC setting, the data format and bpp setting is wrong, for adv7282m, the input video data should be 16bpp UYVY format.

[   26.209968] imx-ipuv3 2400000.ipu: ch 1 word 0 - 00000000 32A00000 00000000 E0020000 0008FC59

[   26.209982] imx-ipuv3 2400000.ipu: ch 1 word 1 - 0D700000 69AE0000 0087C001 000167C0 000002CF

[   26.209991] imx-ipuv3 2400000.ipu: PFS 0x4,

[   26.210002] imx-ipuv3 2400000.ipu: BPP 0x0,

[dtamarii]

Hi,

I'm working with Gabriel GRANGE on this project. We try to set 16BPP UYVY format and we have the same result on our display (image scrolling). Here is parameters log :

[ 1153.273103] imx-ipuv3 2400000.ipu: init channel = 5
[ 1153.273128] imx-ipuv3 2400000.ipu: initializing idma ch 12 @ e6940300
[ 1153.273154] imx-ipuv3 2400000.ipu: ch 12 word 0 - 00000000 00000000 00000000 E0001800 0008FC59
[ 1153.273173] imx-ipuv3 2400000.ipu: ch 12 word 1 - 0D680000 00000000 2143C000 000167C0 00000000
[ 1153.273183] imx-ipuv3 2400000.ipu: PFS 0xa,
[ 1153.273192] imx-ipuv3 2400000.ipu: BPP 0x3,
[ 1153.273206] imx-ipuv3 2400000.ipu: NPB 0xf
[ 1153.273216] imx-ipuv3 2400000.ipu: FW 719,
[ 1153.273225] imx-ipuv3 2400000.ipu: FH 575,
[ 1153.273234] imx-ipuv3 2400000.ipu: EBA0 0x6b400000
[ 1153.273244] imx-ipuv3 2400000.ipu: EBA1 0x0
[ 1153.273253] imx-ipuv3 2400000.ipu: Stride 1439
[ 1153.273262] imx-ipuv3 2400000.ipu: scan_order 0
[ 1153.273271] imx-ipuv3 2400000.ipu: uv_stride 0
[ 1153.273281] imx-ipuv3 2400000.ipu: u_offset 0x0
[ 1153.273289] imx-ipuv3 2400000.ipu: v_offset 0x0
[ 1153.273299] imx-ipuv3 2400000.ipu: Width0 0+1,
[ 1153.273308] imx-ipuv3 2400000.ipu: Width1 0+1,
[ 1153.273317] imx-ipuv3 2400000.ipu: Width2 0+1,
[ 1153.273326] imx-ipuv3 2400000.ipu: Width3 0+1,
[ 1153.273335] imx-ipuv3 2400000.ipu: Offset0 0,
[ 1153.273344] imx-ipuv3 2400000.ipu: Offset1 0,
[ 1153.273353] imx-ipuv3 2400000.ipu: Offset2 0,
[ 1153.273362] imx-ipuv3 2400000.ipu: Offset3 0

We used the command below :

./mxc_v4l2_tvin.out -ow 720 -oh 576 -ol 0 -ot 0 -f UYVY

Are there other parmeter than BPP to verify? When we use this command, PFS = 0xA, this value for this parameter is not documented on imx6 RM.

Is there another command we can try with Freescale unit test?

Regards,

David

[qiang_li-mpu_se]

Hi David, the ch 12 is the post process channel, you should check your capture channel, ch 1, this is used for camera capture, and the wrong PFS and BPP are set on that channel.

If the capture data from ch1 is already wrong, change the setting in ch12 has no use.

[dtamarii]

Thank you for your answer, it is an interesting point of view, from the begining of the project we don't pay attention to this ch 1 trace. In the first log file, we don't noticed the ch 1 settings, only ch 23 and ch 12.

Now, no way to find again this ch 1 settings with the same command.

What is the  linux driver which inits the ch1 settings ?

What is the source file, we have to modify in order to see and inits the ch 1 ?

[qiang_li-mpu_se]

Hi David,

In linux BSP, you can enable the debug messages in file "drivers/mxc/ipu3/ipu_param_mem.h", function _ipu_ch_param_dump(). Then when you run mxc_v4l2_tvin test application, the IDMAC ch0/ch1 setting will be print out.

The capture data path:

CSI -> IDMAC CH0/1 -> MEM -> IDMAC CH12 -> IDMAC CH21 -> MEM -> IDMAC CH23/27 -> Display

So CH0/1 is used to capture the camera data, then it use CH12 and CH21 for resize and CSC, then use CH23/27 for display. So you should make sure the captured data is correct from CH0/1.

[dtamarii]

Thanks a lot for your explanations.
I log the begining of the trace after the command in order to capture ch 1 settings and here is what we see :

[ 4139.576243] imx-ipuv3 2400000.ipu: initializing idma ch 1 @ e6940040
[ 4139.576279] imx-ipuv3 2400000.ipu: ch 1 word 0 - 00000000 00000000 00000000 E0021800 0008FC59
[ 4139.576294] imx-ipuv3 2400000.ipu: ch 1 word 1 - 0D6C0000 D1AD8000 0147C002 0002CFC0 00000000
[ 4139.576304] imx-ipuv3 2400000.ipu: PFS 0xa,
[ 4139.576314] imx-ipuv3 2400000.ipu: BPP 0x3,
[ 4139.576323] imx-ipuv3 2400000.ipu: NPB 0x1f
[ 4139.576333] imx-ipuv3 2400000.ipu: FW 719,
[ 4139.576343] imx-ipuv3 2400000.ipu: FH 575,
[ 4139.576352] imx-ipuv3 2400000.ipu: EBA0 0x6b600000
[ 4139.576362] imx-ipuv3 2400000.ipu: EBA1 0x6b600000
[ 4139.576371] imx-ipuv3 2400000.ipu: Stride 2879
[ 4139.576380] imx-ipuv3 2400000.ipu: scan_order 1
[ 4139.576389] imx-ipuv3 2400000.ipu: uv_stride 0
[ 4139.576399] imx-ipuv3 2400000.ipu: u_offset 0x0
[ 4139.576408] imx-ipuv3 2400000.ipu: v_offset 0x0
[ 4139.576418] imx-ipuv3 2400000.ipu: Width0 0+1,
[ 4139.576427] imx-ipuv3 2400000.ipu: Width1 0+1,
[ 4139.576436] imx-ipuv3 2400000.ipu: Width2 0+1,
[ 4139.576445] imx-ipuv3 2400000.ipu: Width3 0+1,
[ 4139.576454] imx-ipuv3 2400000.ipu: Offset0 0,
[ 4139.576463] imx-ipuv3 2400000.ipu: Offset1 0,
[ 4139.576472] imx-ipuv3 2400000.ipu: Offset2 0,
[ 4139.576481] imx-ipuv3 2400000.ipu: Offset3 0
[ 4139.576497] eba 62100000
[ 4139.576506] eba 6b000000

BPP seems to be good (0x3 ==> 16BPP)

What others parameters we have to verify ?
We noticed that EBA0 and EBA1 have the same parameter, is it a problem ?
What about PFS, NPB, have they a good parameter (value for PFS is not documented).

For us, il seems to be a synchro error because image is scrolling.
How we can verify that VSYNC and HSYNC are well decoded by MIPI2CSI bridge?

Regards,

David

[qiang_li-mpu_se]

Hi David,

The IDMAC CH1 setting is OK, I had reviewed your old register dump. There are some issues:

IPU1_CSI1_SENS_CONF(@0x2638000)        =0x04000A30   --> YUV422 8 bits per color, CCIR interlaced mode (BT.656)

Note: for MIPI camera, the clock mode should be gated or non-gated clock mode

IPU1_CSI1_SENS_FRM_SIZE(@0x2638004) =0x027002CF  --> row=625-1, width=720-1 

IPU1_CSI1_ACT_FRM_SIZE(@0x2638008)    =0x023F02CF  --> row=576-1, width=720-1 

Note: for MIPI camera, the SENS_FRM_SIZE should be same as ACT_FRM_SIZE, 720*576.

With the above setting, if you can capture 2 camera videoes without scroll, they are correct two fields data, then you just need change the capture IDMAC ch1 to interlaced mode to combine the two fields data into one frame. In file drivers\media\platform\mxc\capture\Ipu_csi_enc.c, function csi_enc_setup():

 case IPU_CSI_CLK_MODE_GATED_CLK:
 case IPU_CSI_CLK_MODE_NONGATED_CLK:
 case IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE:
 case IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_DDR:
 case IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_SDR:
-  params.csi_mem.interlaced = false;

+  params.csi_mem.interlaced = true;

[dtamarii]

Thank you for notes.

We verify IPU1_SENS_CONF at init and it is OK, we notice that it changes when apply unit test command.

Angstrom v2015.12 - Kernel 3.14.52-PR3212_V0.0.9

ebmr-008097676869 login: root
Last login: Sat Jan  1 00:00:37 UTC 2000 on ttymxc1
root@ebmr-008097676869:~# dmesg | grep CSI
[    0.094907] SCSI subsystem initialized
[    0.099991] imx-ipuv3 2400000.ipu: IPU CSI0 Regs = e685e000
[    0.100007] imx-ipuv3 2400000.ipu: IPU CSI1 Regs = e6866000
[    0.111843] imx-ipuv3 2800000.ipu: IPU CSI0 Regs = e68e6000
[    0.111859] imx-ipuv3 2800000.ipu: IPU CSI1 Regs = e68e8000
[    0.131473] mxc_mipi_csi2 21dc000.mipi_csi: i.MX MIPI CSI2 driver probed ipu0 csi1
[    0.131503] mxc_mipi_csi2 21dc000.mipi_csi: i.MX MIPI CSI2 dphy version is 0x3130302a
[    0.131598] MIPI CSI2 driver module loaded
[    2.842916] adv7282 0-0021: ADV7282_Dbg: mipi get_error1/MIPI_CSI_ERR1=00000000
[    2.852828] adv7282 0-0021: ADV7282_Dbg: mipi get_error2/MIPI_CSI_ERR2=00000000
[    3.820107] adv7282 0-0021: ADV7282_Dbg: mipi get_error1/MIPI_CSI_ERR1=00000000
[    3.829401] adv7282 0-0021: ADV7282_Dbg: mipi get_error2/MIPI_CSI_ERR2=00000000
[   13.677253] DTA TEST => print CSI_SENS_CONF : done, err=A00
[   13.677287] imx-ipuv3 2400000.ipu: CSI_SENS_CONF = 0x00000A00
[   13.677303] imx-ipuv3 2400000.ipu: CSI_ACT_FRM_SIZE = 0x023F02CF
root@ebmr-008097676869:~# cd /unit_tests/
root@ebmr-008097676869:/unit_tests# ./mxc_v4l2_tvin.out -ow 720 -oh 576 -ol 0 -ot 0 -f UYVY &
root@ebmr-008097676869:/unit_tests# TV decoder chip is adv7282-m_decoder
driver=mxc_vout, card=DISP4 FG, bus=, version=0x00030e34, capabilities=0x04000002
fmt RGB565: fourcc = 0x50424752
fmt BGR24: fourcc = 0x33524742
fmt RGB24: fourcc = 0x33424752
fmt RGB32: fourcc = 0x34424752
fmt BGR32: fourcc = 0x34524742
fmt NV12: fourcc = 0x3231564e
fmt UYVY: fourcc = 0x59565955
fmt YUYV: fourcc = 0x56595559
fmt YUV422 planar: fourcc = 0x50323234
fmt YUV444: fourcc = 0x34343459
fmt YUV420: fourcc = 0x32315559
fmt YVU420: fourcc = 0x32315659
fmt TILED NV12P: fourcc = 0x50564e54
fmt TILED NV12F: fourcc = 0x46564e54
fmt YUV444 planar: fourcc = 0x50343434
start time = 946684915 s, 50575 us

root@ebmr-008097676869:/unit_tests# devmem2 0x2638000
/dev/mem opened.
Memory mapped at address 0x76f3a000.
Read at address  0x02638000 (0x76f3a000): 0x04000A30
root@ebmr-008097676869:/unit_tests# devmem2 0x2638004
/dev/mem opened.
Memory mapped at address 0x76fe0000.
Read at address  0x02638004 (0x76fe0004): 0x023F02CF
root@ebmr-008097676869:/unit_tests# devmem2 0x2638008
/dev/mem opened.
Memory mapped at address 0x76fe2000.
Read at address  0x02638008 (0x76fe2008): 0x023F02CF
root@ebmr-008097676869:/unit_tests#

Is it possible that it is the capture unit test script  which modify the SENS_CONF?

[qiang_li-mpu_se]

When running mxc_v4l2_tvin test application, the SENS_CONF will be set to wrong value, that means your adv7182 driver hasn't report correct information to mxc_v4l2_capture driver.

[dtamarii]

Thank you for your explanations. We don't find on our driver ADV7282 how to send the good parameter.

We force the /drivers/mxc/ipu3/ipu_capture.c to set gated clock mode

"cfg_param.clk_mode = IPU_CSI_CLK_MODE_GATED_CLK;"

Then we verify the CSI_CONF when imx6 captures :

The Angstrom Distribution ebmr-008097676869 ttymxc1

Angstrom v2015.12 - Kernel 3.14.52-PR3212_V0.0.9

ebmr-008097676869 login: root
Last login: Sat Jan 1 00:00:37 UTC 2000 on ttymxc1
root@ebmr-008097676869:~# cd /unit_tests/
root@ebmr-008097676869:/unit_tests# ./mxc_v4l2_tvin.out -ow 720 -oh 576 -ol 0 -ot 0 -f UYVY &
root@ebmr-008097676869:/unit_tests# TV decoder chip is adv7282-m_decoder
driver=mxc_vout, card=DISP4 FG, bus=, version=0x00030e34, capabilities=0x04000002
fmt RGB565: fourcc = 0x50424752
fmt BGR24: fourcc = 0x33524742
fmt RGB24: fourcc = 0x33424752
fmt RGB32: fourcc = 0x34424752
fmt BGR32: fourcc = 0x34524742
fmt NV12: fourcc = 0x3231564e
fmt UYVY: fourcc = 0x59565955
fmt YUYV: fourcc = 0x56595559
fmt YUV422 planar: fourcc = 0x50323234
fmt YUV444: fourcc = 0x34343459
fmt YUV420: fourcc = 0x32315559
fmt YVU420: fourcc = 0x32315659
fmt TILED NV12P: fourcc = 0x50564e54
fmt TILED NV12F: fourcc = 0x46564e54
fmt YUV444 planar: fourcc = 0x50343434
start time = 946684858 s, 284593 us

root@ebmr-008097676869:/unit_tests# devmem2 0x2638000
/dev/mem opened.
Memory mapped at address 0x76f6e000.
Read at address 0x02638000 (0x76f6e000): 0x04000A00
root@ebmr-008097676869:/unit_tests# devmem2 0x2638004
/dev/mem opened.
Memory mapped at address 0x76f5a000.
Read at address 0x02638004 (0x76f5a004): 0x023F02CF
root@ebmr-008097676869:/unit_tests# devmem2 0x2638008
/dev/mem opened.
Memory mapped at address 0x76f23000.
Read at address 0x02638008 (0x76f23008): 0x023F02CF
root@ebmr-008097676869:/unit_tests#

The SENS_CONF value seems to be OK.

Our picture always scrolling but something news, we have 8 pictures (4 pictures with old parameters):

What others parameters I have to verify ?

[qiang_li-mpu_se]

I haven't found other IPU setting issue, can you attach your adv7182 driver here?

[dtamarii]

Here is our ADV7282 driver :

[qiang_li-mpu_se]

In ioctl_g_ifparm(), please set to followed:

     memset(p, 0, sizeof(*p));
     p->if_type = V4L2_IF_TYPE_BT656;
     p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT;
     p->u.bt656.clock_curr = 1;
     p->u.bt656.bt_sync_correct = 1;

After running capture test command, please use "/unit_tests/memtools -32 0x02638000 10" to dump the IPU_CSI1 registers.

[dtamarii]

Thank you for your analysis.

Here are our results :

Reading 0x10 count starting at address 0x02638000

0x02638000: 04008A00 023F02CF 023F02CF 00000000
0x02638010: 00000000 00000000 00000000 00000000
0x02638020: FFFF1EFF 00000000 00000000 00000000
0x02638030: 00000000 00000000 00000000 00000000

The patch is active ("cfg_param.clk_mode = IPU_CSI_CLK_MODE_GATED_CLK;" on ipu_capture.c)

I note that the EXT_VSYNC bit is activated.

What do you think about results?

[dtamarii]

same result on  our display (8 pictures scrolling)

[qiang_li-mpu_se]

The reference patch "0001-Correct-mipi-camera-virtual-channel-setting-in-ipu_c.patch" in "Sample code for iMX6 SabreSD to use MIPI CSI camera with virtual channel 3 " is must since you are not using virtual channel 0. You can reference to that patch to set virtual channel 1 or 3 use case.

The default BSP has issue for not 0 virtual channel setting.

"0x02638020: FFFF1EFF " this register is wrong, and IPU_SMFC_MAP register will also be wrong without that patch.