iMX6 core gets Power via VCC_USB_OTG .

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iMX6 core gets Power via VCC_USB_OTG .

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tamilarasane
Contributor III

Hi All,

We have designed SOM and carrier board for iMX6.

when imx6's OTG port is connected with PC(client mode) ,imx6 voltage  domains VDDHIGH_CAP, VDDARM23, VDDARM_IN are  powered via VCC_USB_OTG pin.

No other supply is given to board SOM and carrier board.

Please help us to solve this issue..

Thanks,

Tamil

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igorpadykov
NXP Employee
NXP Employee

Hi Tamilarasan

i.MX6 internal structures are not fully isolated from each

other, so smal leakage is allowable.

Datasheet provides restrictions for voltages applied

externally to procesor during power-up sequence, however

it does not imply restrictions on leakage voltages generated

from processor.

Best regards

igor

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tamilarasane
Contributor III

Hi igor

Thanks for you reply

yes ,board is working when applying input power.

but this small leakage voltage makes imx6 core to launch upto kernel level.

i,e when OTG cable is inserted in PC , i can able to boot the iMX6 upto

kernel without applying any other input power.

we experienced this issue in very rare case.

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igorpadykov
NXP Employee
NXP Employee

Hi Tamilarasan

such behaviour may depend on particular board power block design.

Was your board was based on Sabre design with MMPF0100 PMIC ?

i.MX6_SABRE_SDP_DESIGNFILES : Design files, including hardware schematics

~igor

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tamilarasane
Contributor III

Hi igor

yes our board  power block is designed using saber design with MMPF0100 PMIC.

thanks,

tamil

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igorpadykov
NXP Employee
NXP Employee

Hi Tamilarasan

on Sabre design i.MX6 POR is connected to MMPF0100 RESETBMCU, according to

MMPF0100 datasheet p.17:

RESETBMCU is an open-drain, active low output configurable for two modes of operation.

In its default mode, it is de-asserted 2.0 to 4.0 ms after the last regulator in the start-up sequence is enabled;

So POR may be only released after MMPF0100 was correctly started up.

What is MMPF0100 behaviour in your case ?

~igor

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tamilarasane
Contributor III

Hi igor,

In Our board, iMX6 POR released after MMPF0100 started up.

In saber design, page No.11 of SCH-27392.PDF , N and P MOSFET are used to control USB_OTG_CON_VBUS Net.


But we didn't implement this logic to control VCC_USB_OTG in  our board( i.e GEN_3V3 from PMIC controls the VCC_USB_OTG in saber )

Below is the image which shows  OTG section of our design.



1.png

Thanks,

Tamil


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igorpadykov
NXP Employee
NXP Employee

Hi Tamilarasan

do you mean that MMPF0100 is starting up correctly without VIN,

only with applying VCC_USB_OTG ?

~igor

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tamilarasane
Contributor III

Hi igor,

No, MMPF0100 is starting up correctly when VIN is applied.

we didn't analysed it for only VCC_USB_OTG applied case.

since we experienced this issue only two times and it is short lived.

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igorpadykov
NXP Employee
NXP Employee

Hi Tamilarasan

only with applying VCC_USB_OTG, MMPF0100 should not

start up, probably there was smth wrong in boards.

~igor

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mohammedazlum
Contributor IV

Hi,

I think VCC_USB_OTG [5.00V] can be sourced 5V from host PC to your board. But current is not sufficient to turn on the PMIC. Is that the problem ?

Regards,

Azlum

Skype : mohammed.azlum

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