iMX6 board boot config, reserved bits

[martinchristian]

Hi,

We are doing a iMX6 design, where we want to control boot device by setting the boot config through the GPIO pins.

We are booting only from a SPI NOR flash memory.

Looking at the fuse map (see figure below) there are signals/bits that are "reserved".

Does this mean that the state (high or low) of this pin at boot time is "don't care"??

I want to leave out the resistors pulling the "reserved" config bits either high or low, to keep BOM count low.

Best Regards,

Martin Christiansen.

[BiyongSUN]

The boot pin is very clear in the datasheet.

[Yuri]

    You may use pulling up or down of the “reserved” boot pins, but please do not
leave them free.  For more details, please refer to 

https://community.freescale.com/thread/358921

Have a great day,
Yuri

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[martinchristian]

Hi Yuri,

Thanks,

I can see from the post you link too, that it is not completely clear why/how to tie those pins.

How long is the window where the iMX6 "reads" these config pins??

What are the "reserved" pins for??

Thanks,

Martin.

[Yuri · Accepted solution]

1.

  As for “How long is the window where the iMX6 "reads" these config pins??” :

The boot pins are latched at POR rising edge, but - strictly speaking -

the hold time  is not specified. Please look at sheet 13 of the i.MX6 SL EVK

design, where bus isolation buffer is applied and the next note is provided :

"i.MX6SL reads values approximately 300uS to 1mS after reset released.

Buffers are active while unit is in reset and 1ms-10ms after reset is released."

https://www.freescale.com/webapp/Download?colCode=iMX6SL_EVK_DESIGNFILES&appType=license&location=nu...

2.
> What are the "reserved" pins for??

As usually – for possible future options.

Regards,

Yuri.