Hi!
I'm working on a iMX6DL board with SDMA and external hardware events. There are two external event lines available: Event 0 on pad T21 and Event 1 on pad U24. (and their alternates)
Event 1 works as it expected:
1. set IOMUXC_GPR0[7]=1
2. set IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA17 to ALT4
3. set IOMUXC_SDMA_EVENTS15_SELECT_INPUT to DISP0_DATA17 (default anyway)
4. it is mapped to event 14 of the SDMA. Setting CHNENBL14 to the desired channel (channel 1 in my case), i.e. value 2.
5. and HO=1, EO=0 and CHNPRI1=7
-> this will let event 1 trigger my SDMA script nicely.
However, the same procedure does not work for the event 0 line. I have verified that the pin is connected (using GPIO) and that the external trigger signal arrives on the chip.
Event 0 is routed to the SDMA by setting IOMUXC_GPR0[0]=1, IOMIXC_SW_MUX_CTL_PAD_DISP0_DATA16=ALT4 and IOMUXC_SDMA_EVENTS14_SELECT_INPUT=DISP0_DATA16
The mapping should be event 2 of the SDMA. I have tried all CHNENBLn, without success.
Furthermore, I have enabled all clocks to be sure (CCM_CCGRn=0xfffffff), without success either.
Any ideas? Looks like a chip bug to me...
Regards,
-Urs
Solved! Go to Solution.
Hi Rob
yes you are right, attached part of rev.2 i.MX6SDL Ref manual
Best regards
igor
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Hi Rob:
did you solved your question? I have the same case about how to triggle the external SDMA request pins about IMX6Q SDMA_EXT_EVENT0. if you solved your problem , please guide something help for me! thanks!
Best regards
lingjia
Hi Rob
yes you are right, attached part of rev.2 i.MX6SDL Ref manual
Best regards
igor
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Hi Igor
Thanks for the acknowledgement. Hope that we receive an updated ref manual soon!
Regards,
-Rob aka Urs
In the latest iMX6QD Ref manual, there is no SDMA event mapping of the external hardware event 0 line...
well, might be the same for MX6SDL?