iMX6 Quad doesn't boot after External Reset

[tamilarasane]

In Imx6 Quad , after pressing RESET switch SOM doesn't boot again. it boots only after hard power on/off.

As per my understanding, through external reset released, internal Reset will release only after  VDD_ARM_CAP and VDD_SOC_CAP supplies
are stable (internal  LDO_CORE and LDO_SOC).

so , i doubt these internal voltage domains and their input voltages  VCC_SW1AB_CORE and VCC_SW1C_SOC of PMIC (MMPF0100F0AEP)

Findings:

1. in Linux, boots  after reset  switch is pressed with out problem and  VCC_SW1AB_CORE and VCC_SW1C_SOC voltages of  PMIC are fine. ( no voltage dip occurs-here current consumption from  VCC_SW1AB_CORE is  < 500mA)

2. In android
         1. if reset switch is pressed at the time of uboot, and kernel loading , booting occurs without problem ( up to this process current consumption form VCC_SW1AB_CORE is  < 700mA )
         2. once android application launches , current consumption from VCC_SW1AB_CORE is increased >900mA, and voltages dip occurs ( snap shot attached) if reset switch is pressed now,  doesn't boot again.


3. first dip occurs from 1.35 to 1.28V at that time current is around 700mA.  if i press reset switch here, boot occurs without problem

4. After some time (  launching android application) continuous dip occurs  from ( 1.28V to 0.992V) here current is around 900mA  . if i reset here, board doesn't boot . and VCC_SW1AB_CORE is in 0.992V itself.

Green -VCC_SW1AB_CORE of PMIC
Blue- VCC_SW1C_SOC of PMIC

Same issues occurs in 3 boards.

Is anyone faced this issue...? Pls let me know the solution for this.?

Thanks

Tamilarasan.

[igorpadykov · Accepted solution]

HI Tamilarasan

recommended to use such reset circuit , which resets both PMIC and

i.MX6, because for example, if i.MX6 in ldo-bypas mode, resetting only

processor will hang it (PMIC voltages may be insufficient for successful boot).

This is addressed by Sabre SD reset circuit design (WDOG connection to PWRON)

i.MX6_SABRE_SDP_DESIGNFILES  spf-27392 p.21 and description in Release Notes

Best regards

igor

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[tamilarasane]

HI igor,

yes your are correct, this issues occurs only at the time of LDO By pass mode..

can you pls share the errata and workarounds for imx6..? where i will get..?

Thanks,

Tamilarasan

[igorpadykov]

HI Tamilarasan

this is not erratum, this is expected behaviour,

workaround is given in my previous answer.

~igor

[tamilarasane]

hi igor,

can you pls share the  "spf-27392 p.21 " document. i can't able to search..

Thanks,

Tamilarasan

[igorpadykov]

attached

~igor