Dear Reader,
I want to use the PoP version of iMX6 in my new design. But there are no reference schematics for the same. Neither are any supported LPDDR2 memories described. I reference some of the blogs regarding the same in community and found that EDB8164B4PT-1DAT-F is compatible.
When I saw the pin connection between two I made following observation:
As per the ball assignment processor channel 1 is connected to memory die 0 and, processor channel 0 is connected to memory die 1. But he Clock Enable signal (CKE_Px) is exchanged, i.e. Processor CKE0_P0 is connected to Memory CKE_A and CKE0_P1 is connected to CKE_B.
Will this configuration work? Or is there any other LPDDR supported?
Thanks in advance.
Pranav
Dear Sir,
Thanks for your kind reply. We are planning to use MCIMX6Q7CZK08AE in our system to get smallest form factor. Moreover MT42L128M64D2LL-25 is obsolete. So EDB8164B4PT-1DAT-F is replacement of the same. But still clock enable is crossed.
Please clarify.
Thanks
DRAM_CKE0P0 AA29 , DRAM_CKE1P0 Y29 in Table 85. 12 x 12 mm
Functional Contact Assignments i.MX 6Dual/6Quad Consumer-PoP
Applications Processor Data Sheet are defined per sect.2.1 LPDDR2 12x12 PoP 2-channel 2x32 package
ballout LPDDR2 JESD209-2D specification.
https://www.nxp.com/docs/en/data-sheet/IMX6DQCPOPEC.pdf
Best regards
igor
Hi Pranav
one can look at below links (also some info were sent via mail)
https://community.nxp.com/thread/472137
Best regards
igor
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