iMX6 Dual - Bug PCIe with i210 device

[micheldasilva]

Hi,

I designed a board with an iMX6 Dual processor. On the PCI express, I linked an I210-IT ( Intel Ethernet Controller PCIe v2.1 2.5GT/s).

|------------------|                                               |------------------|

|   iMX6D        |                                              |    I210-IT       |

|            Clk1   | --------------||-------------------->| PCE_Clk      |

|       PCIe TX | ---------------||-------------------->| PCE RX       |

|       PCIe Rx |<--------------||----------------------| PCE TX       |

| -----------------|                                               |------------------|

For the reference Clock PCIE, I used the output CLK1_P/N to synchronize I210 RefClock. Is it correct or wrong?

I used linux issue YOCTO version 4.1.15_1.0.0.

Sometimes, PCIe  bugs to the READ access and more rarely, to the WRITE access. Have you any suggestions about this problem?

Sincerely,

Michel

[igorpadykov]

Hi Michel

this may be caused by weak signal due to improper layout or noise.

One can try to adjust parameters of PCIe_PHY by changing the IOMUXC_GPR8 register

settings described in AN4784 PCIe Certification Guide for i.MX 6Dual/6Quad and i.MX 6Solo/6DualLite

http://www.nxp.com/assets/documents/data/en/application-notes/AN4784.pdf 

Best regards
igor
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