I enable my Ethernet eth0 and eth1 to communication ,
then plug in-out on eth0 will reset eth1 and vice versa,
that I found docs from https://community.freescale.com/docs/DOC-94983 to explain this issue.
So I masked this GPIO reset function in fec_restart() on fec.c ,
And then plug in-out eth0/eth1 cable test again.
I found another critical issue , in fec_restart() function ,
when I write MAC0 register FEC_ECNTRL(HW_ENET_MAC_ECR) reset bit ,
both eth0 and eth1 will also be reset and the communication will be interrupted.
And if i write MAC0 register FEC_R_CNTRL(HW_ENET_MAC_RCR) RMII_MODE bit to disable,
both eth0 and eth1 will also be reset again.
But when I write this two register from MAC1 , it will not affect eth0
Does anyone have the same issue ?
I have the same issue. Did you get a word from Freescale? Have they tagged it as an errata?
Hi Ayaz :
No , Freescale told to me to post this issue to community.
But seems no one can answer this
Jrtiger
This discussion is closed since no activity. If you still need help, please feel free to reply with an update to this discussion, or create another discussion.
Thanks,
Yixing
Jrtiger
Had your issue got resolved? If yes, we are going to close the discussion in 3 days. If you still need help, please feel
free to reply with an update to this discussion.
Thanks,
Yixing
Well tough luck for us then. Thanks for getting back to me
Cheers!
The issue link to https://community.freescale.com/thread/315877