iMX28 BOOT_MODE bits in HW_OCOTP_ROM0, ROM Bootloader Codes

[mp_baum_de]

Hello All,

I have the following problem: on the HW prototype I received for a new iMX28 board the LCD_RS was left open instead of being pulled high in order to boot as specified by the BM3-BM0 pins. Although LCD_RS ins not pulled low either, I assume the device is now booting as specified by the OTP. However the BOOT_MODE field (bits 24-31) are not documented in HW_OCOTP_ROM0 (20.4.7, page 1447 in iMX28 Application Processor Reference Manual, Rev. 1, 2010).

I want to boot from SSP0 from a SD card at 3.3V.

Can somebody document these bits? How are BM3-BM1, voltage selector and ETM enabler mapped on the BOOT_MODE field bits on the HW_OCOTP_ROM0? Are there also other relevant bits in this field I should be aware of? Learning by doing is clearly not an option for OTP :smileywink:

What are the codes the ROM bootloader is sending via the DEBUG UART (something like H0x80201005, etc) ?

Any help would be greatly appreciated.

Best regards,

Draghi Puterity

[PeterChan · Accepted solution]

Hello Draghi,

Table 12.1 in i.MX28 Reference Manual Rev 1 lists all the boot mode supported by i.MX28 ROM. The BOOT_MODE field (bit 31-24) in HW_OCOTP_ROM0 also follows this table. (HW_OCOTP_ROM0[27:24] maps to BM3-BM0, HW_OCOTP_ROM0[28] maps to voltage selector)

The ENABLE_PIN_BOOT_CHECK bit in HW_OCOTP_ROM7 is also relevant to boot loader. Blow this bit to enable boot loader to first test the LCD_RS pin to determine if the pin boot mode is enabled.

If this bit is blown and LCD_RS is pulled high, then boot mode is determined by the state of LCD_D[5:0] pins.

If this bit is blown and LCD_RS is pulled low, then boot mode is determined by the BOOT_MODE field in HW_OCOTP_ROM0.

If this bit is not blown, the LCD_RS pin testing will be skipped and boot mode is always determined by the state of LCD_D[5:0] pins.

So, please pull the LCD_RS pin to the right direction after the ENABLE_PIN_BOOT_CHECK bit is blown.

Best regards,

Peter