iMX Platform SDK Ethernet MII

[dirkschäfer]

I load my program via tftp. So after u-boot loads it ethernet should be still running.

But reading the MII status is not possible. The u-boot files for the board show the addr=0x02 for the PHY.

dev0->enet_reg = (hw_enet_t *) ENET_BASE_ADDR;

  dev0->tx_busy = 0;

  dev0->status = 0;

  dev0->phy_addr = 2;

  //dev0->phy_id= PHY_KSZ9031_ID;

phyStat= imx_enet_get_phy_status( dev0);

phyStat is always 0, -1 would be a mistake. But the value returned from status is 65535, all 1.

Even if I use 0 or 1 as address of the PHY.

The line phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0x1c00); in u-bbot means that

the PHY id is MDIO_DEVAD_NONE = -1

so

pAddr= 0x02188040;     // MMFR register iMX6q

*pAddr= (1<<30) | (3<<28) | (31<<23) | (1<<18) | (1<<17);

Is this correct?

[dirkschäfer · Accepted solution]

Got it. u-boot disables ethernet after tftp transfer. Just call imx_enet_start.

[alejandrolozan1]

Hi,

Thanks a lot for sharing your solution. That helps for future references.

Best Regards,

Alejandro

[dirkschäfer]

Try to reset the PHY like u-boot does.

- Using enet_iomux_config.c for iMX6q. Adding return to line 1335, the other pins not needed

- Add PHY_KSZ9031_ID = 0x00221620 to enet_private.h

- Add imx_enet_phy_reset to enet_drv.c, here using PIN1_25, or whatever your board is

- Add rework like in u-boot

void enet_phy_rework_ksz9031(imx_enet_priv_t * dev)

{

    imx_enet_mii_write(dev->enet_reg, dev->phy_addr, 0x9, 0x1c00);

    // extended write by 4 writes

    imx_enet_mii_ext_write(dev->enet_reg, 0x02,

                       MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,

                       MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);

    // rx data pad skew - devaddr = 0x02, register = 0x05

    imx_enet_mii_ext_write(dev->enet_reg, 0x02,

                       MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,

                       MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);

    // tx data pad skew - devaddr = 0x02, register = 0x05

    imx_enet_mii_ext_write(dev->enet_reg, 0x02,

                       MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,

                       MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);

    // gtx and rx clock pad skew - devaddr = 0x02, register = 0x08

    imx_enet_mii_ext_write(dev->enet_reg, 0x02,

                       MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,

                       MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x03FF);

}

- AUTONEGOTIATION in imx_enet_phy_init

disable PHY isolation during autoneg, BUT MOST IMPORTANT: WAIT

#if 1

#if 1   

    imx_enet_mii_read(dev->enet_reg, dev->phy_addr, PHY_CTRL_REG, &value);

    value |= 0x1200;

    value &= ~(1<<10);    // do not isolate during aneg

    imx_enet_mii_write(dev->enet_reg, dev->phy_addr, PHY_CTRL_REG, value);

    // abwarten

    do

    {

        hal_delay_us(1000);

        timeout++;

        imx_enet_mii_read(dev->enet_reg, dev->phy_addr, PHY_STATUS_REG, &value);

    } while( (value&(1<<5)) == 0 && timeout < 10000 );

    if( timeout == 10000)

        debug_puts( "auto neg timeout\r\n");

After all this the PHY control register 1Fh shows:

connected

full-duplex

1000M

but the control register 00h shows

full-duplex

100M

And the 1000M is in slave mode.

Never get a recv, ENET_EVENT_RX never reached.

Any one any idea?

Thank you for your help