Custom board using i.mx8m-mini
Using MX8M-Mini-DDR3l_RPA-v9
2 x 1Gx16 ISSI Memory (https://www.issi.com/WW/pdf/43-46TR16K01S2A-AL.pdf) installed (4GB total, 32Gb)
MScale v3.30
The DDR3 has 2 CS lines. CS0 on each die are tied together (DRAM_CS0_N). CS1 of each die are tied together (DRAM_CS1_N).
The RPA line 20 says DRAM density per chip (Gb). The DDRL has 2 ranks - so, my only option is to *assume* this means per rank, and not per physical die on the board. So, I choose 8. However, using that same logic fails on DRAM Bus Width per chip. I feel like the right answer would be 16 - but I don't understand why that value isn't available in the RPA (values stem from cell C124?)
I'm looking for help in selecting the right values in the RPA tool. There aren't _THAT_ many combinations, and I feel like I've tried them all - and none of them will pass calibration. I've had limited success with some in uboot, but stability is non-existent.
I hesitate to share any successes configurations because they all feel like dumb luck. At one point, I was able to calibrate 3 boards, but then when I moved the code to u-boot (2020) it failed, and I was unable to reproduce the calibration from the mscale tool. Ironically, when these successes did occur, the total density detected on the board was 2048MB - which is 1/2 of what is actually present.
