i.mx6ulz GPIO1_IO2 and IO3 to UART1_DCE_TX and DCE_RX

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i.mx6ulz GPIO1_IO2 and IO3 to UART1_DCE_TX and DCE_RX

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Contributor I

Hi,

We are trying to route UART1 TX and RX signals to the GPIO1_IO2 and IO3 pins that are exposed on our custom imx6ulz board to get u-boot output on our host machine's screen after connecting a TTL to USB cable onto those 2 pins.

Our board is made close to the reference mx6ullevk board, thus we modified these lines on the mx6ullevk.c file as follows.

   static iomux_v3_cfg_t const uart1_pads[] = {
-- MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-- MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
++      MX6_PAD_GPIO1_IO02__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
++      MX6_PAD_GPIO1_IO03__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
   };

Rest of the setup_iomux_uart() functions remain the same and gets called inside the board_early_init() function.

The UART1_BASE register is already defined in the '/include/configs/mx6ullevk.h' file and 
ttymxc0 is already the default console value, so we figured we don't need to edit anything there.

Once we compiled the u-boot.imx image using these changes, we weren't able to get any output on these 2 pins when we loaded and booted u-boot.  Also, we tried the same u-boot image on the EVK board, and we still saw output on the default UART1 port. We were assuming that because we changed the routing of UART1 pins, we would not see anything on the EVK board.  

Are we not routing the pins properly and missing a step somewhere? Or do we need to treat GPIO routing differently on the board.c file? Any help in the right direction would be greatly appreciated.

Thanks,

Angshu

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NXP TechSupport
NXP TechSupport

Hi Angshu

I believe method is correct however this may depend on uboot 

version, for example one can look at

Change U-Boot output port on Colibri iMX6 - Toradex Community 

Best regards
igor

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NXP TechSupport
NXP TechSupport

Hi Angshu

one can attach jtag and check iomux settings described in

sect.27.6.9 SW_MUX_CTL_PAD_GPIO1_IO02 SW MUX Control

i.MX 6ULZ Applications Processor Reference Manual

>we weren't able to get any output on these 2 pins when we loaded and booted u-boot..

seems these signals can not be both outputs as described in sect.Figure 53-2. UART external

signals to module signals routing with respect to DCE/DTE mode

Best regards
igor
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Contributor I

Thank you for the information Igor. We will check with JTAG debugger once we get a chance regarding the values of those registers.

But in fundamental terms, we wanted to know if our method of re-routing the pads/signals was valid. Namely, our removal of these 2 lines

--     MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
--     MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),

and addition of these 2 new routing of GPIO1_IO02__UART1_DCE_TX  and GPIO1_IO03__UART1_DCE_RX on mx6ullevk.c? Or is there anything else required to be changed/defined for u-boot image to see the pin changes?

The imx6ul-pinfunc.h file defines those 2 routes with the correct register values and mode/input values as per the reference manual section you referred to.

Thanks,

Angshu

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NXP TechSupport
NXP TechSupport

Hi Angshu

I believe method is correct however this may depend on uboot 

version, for example one can look at

Change U-Boot output port on Colibri iMX6 - Toradex Community 

Best regards
igor

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Contributor I

Hi Igor,

Thanks for the help. I was able to get uart showing up on terminal by setting the pins to dte mode. For u-boot, I used the above linked example and added the set to DTE mode code on board.c (mx6ullevk.c). For Kernel, I changed the &uart1 block to have fsl, dte-mode; to achieve the same result. 

Do you know how we can set the u-boot image to load u-boot, OS, DTB, all from SD2? Is it configuring env. variables in the include/configs/mx6_common.h or mx6ullevk.h files?


Thanks again,

Angshu

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