Decoder circuit
DTSI file: The adv7180 is connected to i2c2 port. The driver definition and pin configuration is given below,
v4l2_cap_0 {
compatible = "fsl,imx6q-v4l2-capture";
ipu_id = <0>;
csi_id = <0>;
mclk_source = <0>;
status = "okay";
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
rtc@68 {
compatible = "st,m41t00";
reg = <0x68>;
};
adv7180: adv7180@21 {
compatible = "adv,adv7180";
reg = <0x21>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1_2>;
clocks = <&clks IMX6QDL_CLK_CKO>;
clock-names = "csi_mclk";
DOVDD-supply = <&vgen3_reg>; /* 3.3v, enabled via 2.8 VGEN6 */
AVDD-supply = <&vgen3_reg>; /* 1.8v */
DVDD-supply = <&vgen3_reg>; /* 1.8v */
PVDD-supply = <&vgen3_reg>; /* 1.8v */
pwn-gpios = <&gpio1 17 0>; /* active high: SD1_DAT1 */
ipu_id = <0>;
csi_id = <0>;
mclk = <24000000>;
mclk_source = <0>;
cvbs = <1>;
};
pinctrl_ipu1_2: ipu1grp-2 {
fsl,pins = <
MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000 /*custom add*/
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000 /*custom add*/
>;
};
Need to know valid deconfig menu to enable the video decoder driver in the kernel level. So that ADV7180 get probed and attached to the ipu/CSI and the etc/dev/ will list Video0 for video input
Hi Purvi
one can try to debug it in function adv7180_probe() checking i2c signals
with oscillosope
adv7180.c\i2c\media\drivers - linux-imx - i.MX Linux kernel
For linux config options one can look at sect.5.2 Machine configurations attached
Yocto Guide, select "imx6qsabreauto" as ADV7180 is supported for i.MX6Q SABRE-AI board.
Best regards
igor
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