Hello,
I attached a PCM3168a to the SSI port of the i.mx6q, the codec provides the bit- and wordclocks (imx is slave) and expects data like this:
(ti pcm3168a datasheet page 25) bit clock is 11.29MHz
I configured ssi scr to work in networked mode and the ssi stccr is set to 0x16705:
-> word length WL 24 bits
-> 8 words per frame (DC)
I looks like the i.mx6 outputs all 8x24bits back to back, i.e. there's no padding to 32 bits.
I need either 24bits data + 8bits padding or 24bits data + 8 bits padding.
How can I configure the ssi to output such a pattern?
Sending 32 bits with the padding bits set to zero seems to be no option as the WL limit is 24 bits.
Regards,
Lo2
Hi Lothar
you are right WL limit is 24 bits as stated in
IMX6DQRM sect.61.1.1 Features :
Programmable word length (8, 10, 12, 16, 18, 20, 22 or 24 bits)
unfortunately, I am afraid it is not possible to extend (or pad in some way) it to 32 bits.
Best regards
igor
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