First, please note that CLK2_P and CLK2_N are the differential LVDS signals, not a regular logic High/Low signals. Most likely, your audio codec IC does not support the LVDS clock input.
Second, there seems to be no appropriate clock source inside i.MX6 processor (if using regular 24MHz crystal as the clock reference) to generate 24.576MHz frequency.
So, most likely, the answer is: no, it is not possible to use the CLK2_P and CLK2_N pins to output the 24.576MHz clock to an external audio codec.
Have a great day,
Artur
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