i.mx 8M Mini: Safe to power down by removing power?

[adevries]

Hello NXP Forum,

I am developing a device that uses the i.MX 8M Mini on a system with no backup battery. I am interested in turning off the device every time by simply unplugging power and letting the voltage rails fall. Using this method, the PMIC will not disable the voltage rails in a specific, timed sequence; rather, it will immediately assert POR_B and disable all voltage rails at the same time. Is this an acceptable way to turn off the 8M Mini? Will turning off the processor in this way shorten its life or potentially cause damage? 

I'm not concerned about the linux OS running on the processor; that can be interrupted at any point without issue. I'm just curious if turning the processor off this way can cause damage electrically.

[adevries]

Hello @Yuri,

Thanks for the reply; I also read that part of datasheet. What I am trying to understand is if shutting the processor down in the way described above complies with the power-down sequence specified in the datasheet (images attached). Since all the minimum times listed in the power-down sequence are 0ms, does that mean it is acceptable to power down the processor by turning off all voltage rails simultaneously? 

If not, is there a certain minimum hold-up capacitance recommended to keep the processor alive long enough to shut down properly?

[Yuri]

@adevries 
Hello,

    It is good practice to use NXP reference design / board as example.
It was tested.

Regards,
Yuri.

[adevries]

Hi @Yuri,

Yes, that is my plan. Does that mean the reference design can be shut down safely every time by unplugging power? Was it designed to be turned off in that way?

[Yuri · Accepted solution]

@adevries 
Hello,

   the reference boards usually work during long time despite of power off method.

Regards,
Yuri.

[adevries]

Hi @Yuri,

Very true. Okay, that makes me more confident using this method of powering down. Thanks!

[Yuri]

@adevries 
Hello,

 According to i.MX8Mm Datasheet there are the following power supplies requirements
and restrictions:

The system design must comply with power-up sequence, power-down sequence, and steady state
guidelines as described in this section to guarantee the reliable operation of the device. Any deviation
from these sequences may result in the following situations:

• Excessive current during power-up phase
• Prevention of the device from booting
• Irreversible damage to the processor (worst-case scenario)

  So, strictly speaking, the worst case scenario is the device damage.

Regards,
Yuri.