I have a i.Mx8ULP where I'm providing an external clock via EXTAL0 (vs. using a crystal directly). Is it possible to gate this clock via an external clock buffer when the i.Mx8ULP enters sleep modes and if so is there a control signal for this? I do see on an i.Mx8ULP eval board that the crystal is stopped some time after entering sleep mode and am trying to do the equivalent with the external clock source.
As specified in Reference Manual Chapter 6.1.1 Low Power Modes: Bit 0 (SOSCEN) of register System OSC Control Status Register (SOSCCSR) comes enabled after POR. Clear the bit 0 (SOSCEN) of register System OSC Control Status Register (SOSCCSR) to disable the System Oscillator and reduce power consumption if it is not used as a clock source.
That doesn't really answer my question. I understand we can turn off the internal oscillator if we are not using it and also that it's automatically turned on and off in sleep modes as set by SOSCDSEN. We're supplying an external clock directly using the EXTAL0 pin. I'm attempting to determine if there's a way for the i.Mx8ULP to control that clock (via an external clock buffer or enable) the same way it does its internal oscillator when going into and out of sleep.
