Dear Community,
I'm working on de-risking activities in order to use the i.MX8X (8QuadPlus) processor for a new project at my company.
Specifically, we are using the M4 Complex's TPM timer to generate a 100KHz clock source for an external peripheral, and a convert signal for an ADC running at the same sampling frequency. At the same time, we're using an FTM timer from the ADMA subsystem to generate an 800KHz and 400KHz clock sources for other peripherals.
Lastly, we have a requirement where the clock sources above must be in sync. Ideally, the rising edge of the 100KHz clock source matching the rising edge of the 800KHz and 400KHz's ones, but I can configure rising/falling edges playing with polarities.
So far, we managed to sync the timers by feeding the 100KHz clock source back into one of the inputs (channels) of the FTM timer which is operating in input capture mode and which is set to reset the timer counter upon input capture events.
So far so good. However, we are aware these timers can handle and generate internal HW triggers. So before I start doing work to test it my question is, are HW triggers routed internally from at least the M4 complex timer, TPM, to the ADMA subsystem (FTM) in such a way we can use them to sync the timers above? Apart from getting the timers in sync, using an internal HW trigger would allow us to release the FTM channel we're using as input to get another 400KHz and avoid using a clock splitter IC.
Many thanks,
Jose
