We have a custom board where we use i2c bus on LVDS0_I2C1_SCL (LSIO_GPIO1_IO08) and LVDS0_I2C1_SDA (LSIO_GPIO_IO09). I am trying to access pinmux registers configuring these pins with devmem2 but thus far I wasn't successful.
I would like to temporarily reconfigure these pins as GPIO pins, read the logical levels on the pins as gpio and then even temporarily configure these pins as GPIO output and drive them high/low with setting GPIO high/low.
I have read the reference manual for processor (i.MX 8QuadMax Applications Processor Reference Manual) and found out that offset for registers I am interested in are 4100h and 4100h, however I am not sure what is the base address of pinmux block as I could not find explicit information about that in reference manual. So I would like to know what is the base address of pinmux block on i.IMX8QM and even base address of GPIO block.
Kernel was configured to allow devmem2 accesses from user space.
