i.MX8QM: MEK board: pad configuration for I2C pins

[asconcepcion]

Hi,

We've noticed in the device tree of the MEK board that all I2C pins used are configured as "inout" (bits 26 and 25 are set to "11"):

pinctrl_i2c0: i2c0grp {
	fsl,pins = <
		IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL	0x06000021
		IMX8QM_HDMI_TX0_TS_SDA_DMA_I2C0_SDA	0x06000021
	>;
};

Our understanding is that "inout" means "push-pull" with input buffer. Is that correct? If that is true, shouldn't the I2C be configured as "open-drain" instead?

Thanks in advanced,

Alejandro.

[AldoG]

Hello,

The OD_INPUT and INOUT are bi-directional, it force the input path on, so it can read / monitor the pin state.

Best regards,
Aldo.

[asconcepcion]

Hi Aldo.

Thanks for the clarification. Just to be sure, that means that if e.g. suddenly another IC is driving that line into LOW while the i.MX8 was driving it into HIGH, the i.MX8 shouldn't try to impose that state in the line, right?

Another question related to this, could you please explain the meaning of the "update pad control" (bit 30) and "update mux mode" (bit 31) of the pin muxing register. I noticed that in the i.MX8QM-MEK they are set to "1" in some cases and "0" in others. What would be their use cases?

Thanks,

Alejandro.

[AldoG]

Hi,

Yes, you’re correct, regarding bit 30 and bit 31, those two are handled by the SCFW, please note that pad configuration is managed by SCFW.

Best regards,
Aldo.