i.MX8MQ is hanging in busfreq-imx8mq.c driver

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i.MX8MQ is hanging in busfreq-imx8mq.c driver

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harshitshah
Contributor III

Hi NXP Team,

We are trying to port the i.MX8MQ custom board to Linux kernel 5.4.3. We are using the 5.4.3 kernel provided by the NXP team.

Please note that on the same board, previous version 4.7 is working well and it is giving file system prompt.

On 5.4 kernel with the same configuration, we are getting the hang. Please find attached logs about the hang.

When debugging the kernel hang we have found that the kernel is hanging/crashing in the busfreq-imx8mq.c driver. While adding the prints I found that it is hanging at busfreq_probe() function. In the probe function, it is hanging at the first iteration where the arm_smccc_smc() is called. 

Attached is device tree, defconfig file and serial logs that I am getting on 5.4.

Please let us know what are the next steps I need to do to get the file-system prompt.

Regards.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Harshit

for such error recommended to run ddr test and use latest RPA tool

i.MX 8M Family DDR Tool Release 

then rebuild all image using Chapter 4 How to bring up a new MX8M board

MX8M DDR Tool User Guide document included in ddr test package,

Best regards
igor
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harshitshah
Contributor III

Thank you, Egor for the reply. I am wondering that the kernel and U-boot are working fine on 4.7 with the same DDR settings. 

Shall I still do the DDR test for the 5.4?

Regards.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Harshit

yes suggest to try latest RPA tool and ddr test and update image.

as there were many improvements regarding stability and fine-tuning of DRAM parameters.

Best regards
igor

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harshitshah
Contributor III

Thank you Igor. 

I will perform the DDR tests and will let you know about the results.

Regards.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Harshit

it is not sufficient to perform only DDR test, after passing test it is necessary

to rebuild full image: uboot + kernel, please use them from nxp official

source.codeaurora.org/external/imx/linux-imx  repository
linux-imx - i.MX Linux kernel 

uboot-imx - i.MX U-Boot 

 

Best regards
igor

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harshitshah
Contributor III

Thank you Igor for the reply. Yes, I have completed the stress test and it was successful as per the steps mentioned. I will replace the mentioned files in the U-boot and will compile the same again.

However, in that generated lpddr4_timing.c file it is written below.

* Generated code from MX8M_DDR_tool
* Align with uboot version:
* imx_v2018.03_4.14.78_1.0.0_ga ~ imx_v2018.04_4.19.35_1.1.0_ga

Is this image valid for lf-5.4.y_v2019.04 U-boot version? When I have replaced the file of lpddr4_timing.c it is giving compilation errors in U-boot. Is there any latest DDR stress test tool available then this which is compatible with the mentioned U-boot version? 

Regards.

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harshitshah
Contributor III

Hi Igor, 

I have performed the DDR Stress test based on the above reference. The Calibration process and DDR stress test is successful with the steps mentioned.  However, when I am compiling U-boot the console is stuck at below level.

U-Boot SPL 2019.04-lf-5.4.y_v2019.04+g228843cdf5 (Jul 01 2020 - 15:40:55 +0000)
PMIC: PFUZE100 ID=0x10
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Trying to boot from MMC2


U-Boot 2019.04-lf-5.4.y_v2019.04+g228843cdf5 (Jul 01 2020 - 15:40:55 +0000)

CPU: Freescale i.MX8MQ rev2.0 1300 MHz (running at 800 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 36C
Reset cause: POR
Model: i.MX8MQ
DRAM: ��

Please find attached the attachments.

1) Excel File used for DDR Tests

2) DDR Stress test file (.ds)

3) lpddr4_timing.c file generated from the above list.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Harshit

 

for industrial parts (max. frequency 1.3GHz) it is necessary to adjust
"a53_opp_table: opp-table" accordingly in dts file:
imx8mq.dtsi\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel 

 

Best regards
igor

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harshitshah
Contributor III

Hi Igor,

The configuration in the device tree is the same as mentioned in the reference link for the kernel still I am getting the hang in kernel.

Can you please let me know why I am getting this error in U-boot in spite of DDR Stress test with the latest version file? 

U-Boot SPL 2019.04-lf-5.4.y_v2019.04+g228843cdf5 (Jul 01 2020 - 15:40:55 +0000)
PMIC: PFUZE100 ID=0x10
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Trying to boot from MMC2


U-Boot 2019.04-lf-5.4.y_v2019.04+g228843cdf5 (Jul 01 2020 - 15:40:55 +0000)

CPU: Freescale i.MX8MQ rev2.0 1300 MHz (running at 800 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 36C
Reset cause: POR
Model: i.MX8MQ
DRAM: ��

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Harshit

>The configuration in the device tree is the same as mentioned in the reference link

in reference link configuration is for consumer parts (max. frequency 1.5GHz),

for industrial parts (max. frequency 1.3GHz) it is necessary to adjust
"a53_opp_table: opp-table" accordingly in dts file:
imx8mq.dtsi\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel 

 

Best regards
igor

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harshitshah
Contributor III

Hi Igor,

As per the above dts file, I have implemented the following changes for the industrial-grade for a53_opp_table in imx8mq.dtsi file.

opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <900000>;
/* Industrial only */
opp-supported-hw = <0xf>, <0x4>;
clock-latency-ns = <150000>;
opp-suspend;
};

opp-1300000000 {
opp-hz = /bits/ 64 <1300000000>;
opp-microvolt = <1000000>;
opp-supported-hw = <0xc>, <0x4>;
clock-latency-ns = <150000>;
opp-suspend;
};

However, with the above device tree as well I am facing the same hang.

Regards.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Harshit

- from log: "CPU: Freescale i.MX8MQ rev2.0 1300 MHz (running at 800 MHz)"

chip revision B0 used, for that revision "lpddr4_timing_b0.c" (with two ddr frequency

setpoints) should be used, not "lpddr4_timing.c" as in attachment

lpddr4_timing_b0.c\imx8mq_evk\freescale\board - uboot-imx - i.MX U-Boot 

-  for uboot hang : "DRAM: ��"

suggest to rebuild uboot using recommendations given in

Chapter 4 How to bring up a new MX8M board MX8M_DDR_Tool_User_Guide

included in ddr test package

https://community.nxp.com/docs/DOC-340179 

Best regards
igor

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harshitshah
Contributor III

Hi Igor,

1) I have checked that with the lpddr4_timing_b0.c and recompilation U-boot is still hanging.

2) I have attached MX8M_LPDDR4_RPA_v24 through which I have performed calibration and stress tests, please confirm those settings are correct for the 4 GB LPDDR4 chipset.

3) I have followed.MX 8M Family DDR Tool Release guide and performed the steps for DDR configurations, but still, I am getting the same hang.

Please suggest the next steps for bring up this board. 

Regards

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harshitshah
Contributor III

Hi Igor,

What are the changes required to be performed in the U-boot source to change the DDR from 3GB to 4GB (in addition to DDR Stress test and Calibration) ?

Based on one of your reply 4GB lpddr4 RAM working with iMX8MQ I have performed below settings.

# Change - 1 (I have made this change as I thought it was required to be changed even without this change as well we are facing same hang)

diff --git a/arch/arm/dts/fsl-imx8mq.dtsi b/arch/arm/dts/fsl-imx8mq.dtsi
index cf8b41689f..d6808f34d8 100644
--- a/arch/arm/dts/fsl-imx8mq.dtsi
+++ b/arch/arm/dts/fsl-imx8mq.dtsi
@@ -51,7 +51,7 @@

memory@40000000 {
device_type = "memory";
- reg = <0x00000000 0x40000000 0 0xc0000000>;
+ reg = <0x00000000 0x40000000 0x00000001 0x00000000>;
};

# Change - 2

diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h
index f153337a89..6caf2f249d 100644
--- a/include/configs/imx8mq_evk.h
+++ b/include/configs/imx8mq_evk.h
@@ -206,7 +206,7 @@

#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
-#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
+#define PHYS_SDRAM_SIZE 0x100000000 /* 4GB DDR */

#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \

# Change - 3 

diff --git a/board/freescale/imx8mq_evk/imx8mq_evk.c b/board/freescale/imx8mq_evk/imx8mq_evk.c
index 941620eedf..5a4dece8ee 100644
--- a/board/freescale/imx8mq_evk/imx8mq_evk.c
+++ b/board/freescale/imx8mq_evk/imx8mq_evk.c
@@ -75,6 +75,17 @@ int dram_init(void)
return 0;
}

+/* Get the top of usable RAM */
+ulong board_get_usable_ram_top(ulong total_size)
+{
+ //printf("board_get_usable_ram_top total_size is 0x%lx \n", total_size);
+
+ if(gd->ram_top > 0x100000000)
+ gd->ram_top = 0x100000000;
+
+ return gd->ram_top;
+}
+

1) Am I missing any change for the 4GB configuration? 

2) The specification of the iMX8MQ is showing SDRAM_BASE size as 3GB. Please confirm that the PHYS_SDRAM.

DDR Memory Map.PNG

Regards.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Harshit

 

that thread was marked as answered, so patch on that thread seems correct.

 

Best regards
igor

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harshitshah
Contributor III

Hi Igor,

The version of the U-boot they were using was 2018.03 and we are using the latest U-boot 2019.04 here.

Regards.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Harshit

 

how many boards affected by that issue.

 

Best regards
igor

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harshitshah
Contributor III

Hi Igor,

I have checked on 3 different boards and it is having the same issue. I have less doubts this is the board issue. As the change, https://community.nxp.com/thread/493670 is working well with 2018.03 U-boot.

However, the same change is causing hang in the 2019.04 U-boot version ( Please note that in both the cases same DDR Stress tests lpddr4_timing.c configurations are integrated). 

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Harshit

 

however in your first message (hang_boot_logs.txt.zip) seems uboot boots fine,

it hangs in kernel.

After some your modifications uboot hangs. What are those modifications,

could you provide full uboot logs in both cases.

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harshitshah
Contributor III
Hi Igor,
I have performed the DDR Stress test and applied the changes to the lpddr4_timing_b0.c file on 2 different U-boot versions. On top of that, the following are the changes that were done to support the 4GB DDR.
===========================================================

# Change - 1 (I have made this change as I thought it was required to be changed even without this change as well we are facing same hang)

diff --git a/arch/arm/dts/fsl-imx8mq.dtsi b/arch/arm/dts/fsl-imx8mq.dtsi
index cf8b41689f..d6808f34d8 100644
--- a/arch/arm/dts/fsl-imx8mq.dtsi
+++ b/arch/arm/dts/fsl-imx8mq.dtsi
@@ -51,7 +51,7 @@

memory@40000000 {
device_type = "memory";
- reg = <0x00000000 0x40000000 0 0xc0000000>;
+ reg = <0x00000000 0x40000000 0x00000001 0x00000000>;
};

 

# Change - 2

diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h
index f153337a89..6caf2f249d 100644
--- a/include/configs/imx8mq_evk.h
+++ b/include/configs/imx8mq_evk.h
@@ -206,7 +206,7 @@

#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
-#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
+#define PHYS_SDRAM_SIZE 0x100000000 /* 4GB DDR */

#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \

 

# Change - 3 

diff --git a/board/freescale/imx8mq_evk/imx8mq_evk.c b/board/freescale/imx8mq_evk/imx8mq_evk.c
index 941620eedf..5a4dece8ee 100644
--- a/board/freescale/imx8mq_evk/imx8mq_evk.c
+++ b/board/freescale/imx8mq_evk/imx8mq_evk.c
@@ -75,6 +75,17 @@ int dram_init(void)
return 0;
}

+/* Get the top of usable RAM */
+ulong board_get_usable_ram_top(ulong total_size)
+{
+ //printf("board_get_usable_ram_top total_size is 0x%lx \n", total_size);
+
+ if(gd->ram_top > 0x100000000)
+ gd->ram_top = 0x100000000;
+
+ return gd->ram_top;
+}
+

===========================================================
-=================
Logs
1) The version that was working was the 2018.03 version.
===========================================================
U-Boot SPL 2018.03-master_v2018.03+g79594fe (Jan 23 2020 - 17:37:20 +0000)
PMIC:  PFUZE100 ID=0x10
DDRINFO: start lpddr4 ddr init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Trying to boot from MMC1


U-Boot 2018.03-master_v2018.03+g79594fe (Jan 23 2020 - 17:37:20 +0000)

CPU:   Freescale i.MX8MQ rev2.0 1300 MHz (running at 800 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 37C
Reset cause: POR
Model: i.MX8MQ
DRAM:  4 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
No panel detected: default to HDMI
Display: HDMI (1280x720)
In:    serial
Out:   serial
Err:   serial

 BuildInfo:
  - ATF a-20190
  - U-Boot 2018.03-master_v2018.03+g79594fe

switch to partitions #0, OK
mmc0(part 0) is current device
flash target is MMC:0
Net:   No ethernet found.
Fastboot: Normal
Normal Boot
Hit any key to stop autoboot:  0 
==========================================================
2) The logs which are creating hang are of the 2019.04 version.
  ==========================================================  
U-Boot SPL 2019.04-lf-5.4.y_v2019.04+g228843cdf5 (Jul 06 2020 - 15:40:39 +0000)
PMIC:  PFUZE100 ID=0x10
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Trying to boot from MMC2


U-Boot 2019.04-lf-5.4.y_v2019.04+g228843cdf5 (Jul 06 2020 - 15:40:39 +0000)

CPU:   Freescale i.MX8MQ rev2.0 1300 MHz (running at 800 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 37C
Reset cause: POR
Model: i.MX8MQ
DRAM:  ��
==========================================================
Regards.
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