Dear NXP,
I'm using i.MX8MN Nano with CSI2. This processor has new ISI image sensor interface block.
Kernel driver imx8-mipi-csi2-sam.c and imx8-isi-cap.c both reference this peripheral but it seems only partially documented in released NXP documentation.
For example device tree references a so-called "dispmix" block/peripheral at 0x32e28000 which is being configured, I think, for image sources and sinks.
Also, IMX8MNRM manual hints at this peripheral in one "code example":
5.2.9.4 Example Code 4
// GPU/DISP/HSIOMIX power up and power down flow:
reg32_write(0x32e28000,0x0000007f);
reg32_write(0x32e28004,0x00001fff);
//release dispmix sft reset
//dispmix sft clock enable
There are several registers and values present in the source like, i.e., GASKET_0_CTRL_DATA_TYPE_YUV420_8 but nothing like this is to be found in the datasheet or TRM which makes debugging of new sensors very difficult.
What is "DISPMIX"?
Where is the documentation for it?
Thank you.
Hendrik
