Hello,
We use Flexspi to access FPGA. When A53 read 2048 bytes via AHB it used 20us , and M4 used 200us with same configuration. Is that resonable ?Is there a way to improve the performance for Flexspi AHB Reading from M4?
Hi Ethan
seems this is architecture limitation similar to https://community.nxp.com/t5/i-MX-Processors/iMX7d-GPIO-toggle-frequency-M4-slower-than-A7/m-p/65668...
Best regards
igor