i.MX8M reset output

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i.MX8M reset output

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sekiguchi
Contributor I

Hello

When the i.MX8M starts up, at what timing is the reset signal released to another device (for example, SDIO or PCIe) after the POR released?

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Yuri
NXP Employee
NXP Employee

@sekiguchi 
Hello,

  

i.MX8M internal reset controller, which is responsible for
generation of all reset signals, is described in section 6.5
[System Reset Controller (SRC)] of i.MX 8M Reference Manual
(Rev. 3.1, 06/2021).

< https://www.nxp.com/webapp/Download?colCode=IMX8MDQLQRM >

According to section 6.5.4 (ower-On Reset and power sequencing):

"This module generates an internal POR_B signal that is logically AND'ed with any
externally applied SRC_POR_B signal. The internal POR_B signal will be held low until
all of the following conditions are met:
• 4ms after the external power supply VDDHIGH_IN is valid
• 1ms after the VDD_SOC_CAP supply is valid
The 4ms and 1ms delays are derived from counting the 32 kHz RTC clock cycles; the
accuracy depends on the accuracy of the RTC. When the RTC crystal is either absent or
in the process of powering up, an internal ring oscillator will be the source of RTC, which
is not as accurate as the crystal."

For more internal timings, please refer to section 6.5.5.1.2.1 [POR (SRC_POR_B)].

Regards,
Yuri.

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